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Add vmul_n, vmul_lane, vmulx neon instructions #1147

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Merged
merged 4 commits into from
Apr 30, 2021

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SparrowLii
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This PR completes the vmul and vmulx instructions

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r? @Amanieu

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@SparrowLii SparrowLii force-pushed the vmul branch 2 times, most recently from 116ca10 to 626a4f4 Compare April 29, 2021 09:31
b = 1, 3
validate 17

aarch64 = pmull2
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pmull with the p128 type should depend on the crypto feature.

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While you're at it, could you move vmull_p64 into the code generator as well? It should be available on both arm and aarch64 with the crypto feature enabled.

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So should we use #[target_feature(enable = "neon, crypto")]?

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Yes. Although keep in mind that in the future we will split the crypto feature into separate aes and sha2 features to match LLVM.

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@SparrowLii SparrowLii Apr 29, 2021

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Ok.

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I did not find the implementation of vmull_p64 on arm in llvm, so I don’t know what link should be used

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@Amanieu Amanieu Apr 29, 2021

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I checked Clang and it seems to be missing this intrinsic on ARM. However I checked the LLVM source code and you should be able to make it generate the correct instruction with llvm.arm.neon.vmullp.v2i64 with inputs i64x1 and output i64x2. However I have not tested it so it may not work.

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It looks like it cannot compile successfully: godbolt

#[cfg(target_arch = "arm")]
#[target_feature(enable = "neon,crypto,v8")]
pub unsafe fn vmull_p64(a: p64, b: p64) -> p128 {
    #[allow(improper_ctypes)]
    extern "C" {
        #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmullp.v2i64")]
        fn vmull_p64_(a: int64x1_t, b: int64x1_t) -> int64x2_t;
    }
transmute(vmull_p64_(transmute(a), transmute(b)))
}
Intrinsic has incorrect argument type!
<2 x i64> (<1 x i64>, <1 x i64>)* @llvm.arm.neon.vmullp.v2i64
in function _ZN7example9vmull_p6417hc3e4f087b1fb350cE
LLVM ERROR: Broken function found, compilation aborted!

I tried to find a solution in the source code of llvm, but it seems that it should use v2i64. I don't know where the problem is

  def  VMULLp8   :  N3VLInt<0, 1, 0b00, 0b1110, 0, IIC_VMULi16D, "vmull", "p8",
                            v8i16, v8i8, int_arm_neon_vmullp, 1>;
  def  VMULLp64  : N3VLIntnp<0b00101, 0b10, 0b1110, 0, 0, NoItinerary,
                          "vmull", "p64", v2i64, v1i64, int_arm_neon_vmullp, 1>,
                    Requires<[HasV8, HasCrypto]>;

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3 participants