Re-organize intrinsic-test to enable seamless addition of behaviour testing for more architectures

crates/intrinsic-test/src/argument.rs → crates/intrinsic-test/src/arm/argument.rs

@@ -1,10 +1,12 @@
+use super::format::Indentation;
+use super::json_parser::ArgPrep;
+use super::types::{IntrinsicType, TypeKind};
+use crate::common::types::Language;
+use serde::Deserialize;
+use serde_json::Value;
+use std::collections::HashMap;
 use std::ops::Range;
 
-use crate::Language;
-use crate::format::Indentation;
-use crate::json_parser::ArgPrep;
-use crate::types::{IntrinsicType, TypeKind};
-
 /// An argument for the intrinsic.
 #[derive(Debug, PartialEq, Clone)]
 pub struct Argument {
@@ -18,12 +20,13 @@ pub struct Argument {
     pub constraints: Vec<Constraint>,
 }
 
-#[derive(Debug, PartialEq, Clone)]
+#[derive(Debug, PartialEq, Clone, Deserialize)]
 pub enum Constraint {
     Equal(i64),
     Range(Range<i64>),
 }
 
+/// ARM-specific
 impl TryFrom<ArgPrep> for Constraint {
     type Error = ();
 
@@ -78,12 +81,27 @@ impl Argument {
         (arg[..split_index + 1].trim_end(), &arg[split_index + 1..])
     }
 
-    pub fn from_c(pos: usize, arg: &str, arg_prep: Option<ArgPrep>) -> Argument {
+    // ARM-specific
+    pub fn from_c(
+        pos: usize,
+        arg: &str,
+        target: &String,
+        metadata: Option<&mut HashMap<String, Value>>,
+    ) -> Argument {
         let (ty, var_name) = Self::type_and_name_from_c(arg);
 
-        let ty = IntrinsicType::from_c(ty)
+        let ty = IntrinsicType::from_c(ty, target)
             .unwrap_or_else(|_| panic!("Failed to parse argument '{arg}'"));
 
+        let arg_name = Argument::type_and_name_from_c(&arg).1;
+        let arg = metadata.and_then(|a| a.remove(arg_name));
+        let arg_prep: Option<ArgPrep> = arg.and_then(|a| {
+            if let Value::Object(_) = a {
+                a.try_into().ok()
+            } else {
+                None
+            }
+        });
         let constraint = arg_prep.and_then(|a| a.try_into().ok());
 
         Argument {
@@ -209,36 +227,23 @@ impl ArgumentList {
     /// Creates a line for each argument that initializes the argument from an array `[arg]_vals` at
     /// an offset `i` using a load intrinsic, in C.
     /// e.g `uint8x8_t a = vld1_u8(&a_vals[i]);`
-    pub fn load_values_c(&self, indentation: Indentation, target: &str) -> String {
+    ///
+    /// ARM-specific
+    pub fn load_values_c(&self, indentation: Indentation) -> String {
         self.iter()
             .filter_map(|arg| {
                 // The ACLE doesn't support 64-bit polynomial loads on Armv7
                 // This and the cast are a workaround for this
-                let armv7_p64 = if let TypeKind::Poly = arg.ty.kind() {
-                    target.contains("v7")
-                } else {
-                    false
-                };
 
                 (!arg.has_constraint()).then(|| {
                     format!(
-                        "{indentation}{ty} {name} = {open_cast}{load}(&{name}_vals[i]){close_cast};\n",
+                        "{indentation}{ty} {name} = cast<{ty}>({load}(&{name}_vals[i]));\n",
                         ty = arg.to_c_type(),
                         name = arg.name,
                         load = if arg.is_simd() {
-                            arg.ty.get_load_function(armv7_p64)
+                            arg.ty.get_load_function_c()
                         } else {
                             "*".to_string()
-                        },
-                        open_cast = if armv7_p64 {
-                            format!("cast<{}>(", arg.to_c_type())
-                        } else {
-                            "".to_string()
-                        },
-                        close_cast = if armv7_p64 {
-                            ")".to_string()
-                        } else {
-                            "".to_string()
                         }
                     )
                 })
@@ -258,7 +263,7 @@ impl ArgumentList {
                         name = arg.name,
                         vals_name = arg.rust_vals_array_name(),
                         load = if arg.is_simd() {
-                            arg.ty.get_load_function(false)
+                            arg.ty.get_load_function_rust()
                         } else {
                             "*".to_string()
                         },

crates/intrinsic-test/src/arm/config.rs

@@ -0,0 +1,34 @@
+pub fn build_notices(line_prefix: &str) -> String {
+    format!(
+        "\
+{line_prefix}This is a transient test file, not intended for distribution. Some aspects of the
+{line_prefix}test are derived from a JSON specification, published under the same license as the
+{line_prefix}`intrinsic-test` crate.\n
+"
+    )
+}
+
+pub const POLY128_OSTREAM_DEF: &str = r#"std::ostream& operator<<(std::ostream& os, poly128_t value) {
+    std::stringstream temp;
+    do {
+      int n = value % 10;
+      value /= 10;
+      temp << n;
+    } while (value != 0);
+    std::string tempstr(temp.str());
+    std::string res(tempstr.rbegin(), tempstr.rend());
+    os << res;
+    return os;
+}"#;
+
+pub const AARCH_CONFIGURATIONS: &str = r#"
+#![cfg_attr(target_arch = "arm", feature(stdarch_arm_neon_intrinsics))]
+#![cfg_attr(target_arch = "arm", feature(stdarch_aarch32_crc32))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_fcma))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_dotprod))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_i8mm))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_sha3))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_sm4))]
+#![cfg_attr(any(target_arch = "aarch64", target_arch = "arm64ec"), feature(stdarch_neon_ftts))]
+#![feature(stdarch_neon_f16)]
+"#;