Skip to content

Increase baseline SPI bulk transfer speeds #89

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Nov 18, 2019
Merged

Increase baseline SPI bulk transfer speeds #89

merged 2 commits into from
Nov 18, 2019

Conversation

nseidle
Copy link
Member

@nseidle nseidle commented Nov 15, 2019

This decreases the byte wise transaction from 26us to 19us, a 25% improvement. It does it by moving the iomTransfer struct to global and assigning the values that don't change into the begin function.

These changes along with the SDfat changes (incoming) make for some spectacular performance:

With SPI clock freq at 48MHz we get

write: 286 / 289 kb/s
read: 958 / 958 kb/s

On a clean format, 8GB Sandisk microSD card.

There was also a bug that allowed the core SPI freq to go above 48MHz. This PR fixes that as well.

@oclyke oclyke merged commit 3f15c7d into master Nov 18, 2019
@oclyke oclyke deleted the betterSPI branch November 18, 2019 16:12
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants