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Merged
merged 4 commits into from
Nov 5, 2024
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chore(g4): update to latest STM32CubeG4 v1.6.1 #2540

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28d7263
system(G4) update STM32G4xx HAL Drivers to v1.2.5
fpistm Oct 31, 2024
ae3db51
system(G4): update STM32G4xx CMSIS Drivers to v1.2.5
fpistm Oct 31, 2024
182cab6
core(G4): update wrapped files
fpistm Oct 31, 2024
e11bbcd
chore(g4): update variants against CubeMX DB release 6.0.120
fpistm Oct 31, 2024
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4 changes: 4 additions & 0 deletions cores/arduino/stm32/stm32_def_build.h
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Original file line number Diff line number Diff line change
Expand Up @@ -202,6 +202,10 @@
#define CMSIS_STARTUP_FILE "startup_stm32g0b1xx.s"
#elif defined(STM32G0C1xx)
#define CMSIS_STARTUP_FILE "startup_stm32g0c1xx.s"
#elif defined(STM32G411xB)
#define CMSIS_STARTUP_FILE "startup_stm32g411xb.s"
#elif defined(STM32G411xC)
#define CMSIS_STARTUP_FILE "startup_stm32g411xc.s"
#elif defined(STM32G414xx)
#define CMSIS_STARTUP_FILE "startup_stm32g414xx.s"
#elif defined(STM32G431xx)
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11,550 changes: 11,550 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g411xb.h
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11,823 changes: 11,823 additions & 0 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g411xc.h
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35 changes: 23 additions & 12 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g414xx.h
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Expand Up @@ -988,18 +988,18 @@ typedef struct {

#define FLASH_BASE (0x08000000UL) /*!< FLASH (up to 256 kB) base address */
#define SRAM1_BASE (0x20000000UL) /*!< SRAM1(up to 40 KB) base address */
#define CCMSRAM_BASE (0x10000000UL) /*!< CCMSRAM(16 KB) base address */
#define CCMSRAM_BASE (0x10000000UL) /*!< CCMSRAM(20 KB) base address */
#define PERIPH_BASE (0x40000000UL) /*!< Peripheral base address */

#define SRAM1_BB_BASE (0x22000000UL) /*!< SRAM1(40 KB) base address in the bit-band region */
#define CCMSRAM_BB_BASE (0x22300000UL) /*!< CCMSRAM(16 KB) base address in the bit-band region */
#define CCMSRAM_BB_BASE (0x22300000UL) /*!< CCMSRAM(20 KB) base address in the bit-band region */
#define PERIPH_BB_BASE (0x42000000UL) /*!< Peripheral base address in the bit-band region */
/* Legacy defines */
#define SRAM_BASE SRAM1_BASE
#define SRAM_BB_BASE SRAM1_BB_BASE

#define SRAM1_SIZE_MAX (0x0000A000UL) /*!< maximum SRAM1 size (up to 40 KBytes) */
#define CCMSRAM_SIZE (0x00004000UL) /*!< CCMSRAM size (16 KBytes) */
#define CCMSRAM_SIZE (0x00005000UL) /*!< CCMSRAM size (20 KBytes) */

/*!< Peripheral memory map */
#define APB1PERIPH_BASE PERIPH_BASE
Expand Down Expand Up @@ -12720,15 +12720,15 @@ typedef struct {
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -12739,6 +12739,17 @@ typedef struct {
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
Expand Down
29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h
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Expand Up @@ -8831,15 +8831,15 @@ typedef struct
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -8850,6 +8850,17 @@ typedef struct
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
Expand Down
29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h
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Expand Up @@ -9061,15 +9061,15 @@ typedef struct
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -9080,6 +9080,17 @@ typedef struct
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
Expand Down
29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g471xx.h
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Expand Up @@ -9415,15 +9415,15 @@ typedef struct
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -9434,6 +9434,17 @@ typedef struct
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
Expand Down
29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h
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Expand Up @@ -9965,15 +9965,15 @@ typedef struct
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -9984,6 +9984,17 @@ typedef struct
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
Expand Down
29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
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Expand Up @@ -13544,15 +13544,15 @@ typedef struct {
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -13563,6 +13563,17 @@ typedef struct {
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
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29 changes: 20 additions & 9 deletions system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g483xx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -10195,15 +10195,15 @@ typedef struct
#define TAMP_CR2_TAMP3NOERASE_Pos (2U)
#define TAMP_CR2_TAMP3NOERASE_Msk (0x1UL << TAMP_CR2_TAMP3NOERASE_Pos) /*!< 0x00000004 */
#define TAMP_CR2_TAMP3NOERASE TAMP_CR2_TAMP3NOERASE_Msk
#define TAMP_CR2_TAMP1MF_Pos (16U)
#define TAMP_CR2_TAMP1MF_Msk (0x1UL << TAMP_CR2_TAMP1MF_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MF_Msk
#define TAMP_CR2_TAMP2MF_Pos (17U)
#define TAMP_CR2_TAMP2MF_Msk (0x1UL << TAMP_CR2_TAMP2MF_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MF_Msk
#define TAMP_CR2_TAMP3MF_Pos (18U)
#define TAMP_CR2_TAMP3MF_Msk (0x1UL << TAMP_CR2_TAMP3MF_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MF_Msk
#define TAMP_CR2_TAMP1MSK_Pos (16U)
#define TAMP_CR2_TAMP1MSK_Msk (0x1UL << TAMP_CR2_TAMP1MSK_Pos) /*!< 0x00010000 */
#define TAMP_CR2_TAMP1MSK TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP2MSK_Pos (17U)
#define TAMP_CR2_TAMP2MSK_Msk (0x1UL << TAMP_CR2_TAMP2MSK_Pos) /*!< 0x00020000 */
#define TAMP_CR2_TAMP2MSK TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP3MSK_Pos (18U)
#define TAMP_CR2_TAMP3MSK_Msk (0x1UL << TAMP_CR2_TAMP3MSK_Pos) /*!< 0x00040000 */
#define TAMP_CR2_TAMP3MSK TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP1TRG_Pos (24U)
#define TAMP_CR2_TAMP1TRG_Msk (0x1UL << TAMP_CR2_TAMP1TRG_Pos) /*!< 0x01000000 */
#define TAMP_CR2_TAMP1TRG TAMP_CR2_TAMP1TRG_Msk
Expand All @@ -10214,6 +10214,17 @@ typedef struct
#define TAMP_CR2_TAMP3TRG_Msk (0x1UL << TAMP_CR2_TAMP3TRG_Pos) /*!< 0x04000000 */
#define TAMP_CR2_TAMP3TRG TAMP_CR2_TAMP3TRG_Msk

/* Legacy aliases */
#define TAMP_CR2_TAMP1MF_Pos TAMP_CR2_TAMP1MSK_Pos
#define TAMP_CR2_TAMP1MF_Msk TAMP_CR2_TAMP1MSK_Msk
#define TAMP_CR2_TAMP1MF TAMP_CR2_TAMP1MSK
#define TAMP_CR2_TAMP2MF_Pos TAMP_CR2_TAMP2MSK_Pos
#define TAMP_CR2_TAMP2MF_Msk TAMP_CR2_TAMP2MSK_Msk
#define TAMP_CR2_TAMP2MF TAMP_CR2_TAMP2MSK
#define TAMP_CR2_TAMP3MF_Pos TAMP_CR2_TAMP3MSK_Pos
#define TAMP_CR2_TAMP3MF_Msk TAMP_CR2_TAMP3MSK_Msk
#define TAMP_CR2_TAMP3MF TAMP_CR2_TAMP3MSK

/******************** Bits definition for TAMP_FLTCR register ***************/
#define TAMP_FLTCR_TAMPFREQ_0 (0x00000001UL)
#define TAMP_FLTCR_TAMPFREQ_1 (0x00000002UL)
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