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[6.0][IRGen] Fix emitPrimitiveLoadPayloadAndExtraTag for CVW #75271

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Merged
merged 1 commit into from
Jul 16, 2024

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@drexin drexin commented Jul 16, 2024

Explanation: When casting the projectedBits to Int8, we accidetnally passed the base addr instead of the projectedBits. This was causing the wrong bits to be read.
Scope: Compact value witnesses only.
Issue: rdar://129627898
Original PR: #75270
Risk: Low. Only affects compact value witnesses.
Reviewers: @tbkka

@drexin drexin requested a review from a team as a code owner July 16, 2024 17:29
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drexin commented Jul 16, 2024

@swift-ci test

@drexin drexin changed the title [IRGen] Fix emitPrimitiveLoadPayloadAndExtraTag for CVW [6.0][IRGen] Fix emitPrimitiveLoadPayloadAndExtraTag for CVW Jul 16, 2024
@drexin drexin added 🍒 release cherry pick Flag: Release branch cherry picks swift 6.0 labels Jul 16, 2024
rdar://129627898

When casting the projectedBits to Int8, we accidetnally passed the base addr instead of the projectedBits. This was causing the wrong bits to be read.
@drexin drexin force-pushed the wip-131798355-6.0 branch from 2bb33ac to c1c050d Compare July 16, 2024 17:34
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drexin commented Jul 16, 2024

@swift-ci test

@drexin drexin enabled auto-merge July 16, 2024 23:11
@drexin drexin merged commit 5e8e659 into swiftlang:release/6.0 Jul 16, 2024
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@drexin drexin deleted the wip-131798355-6.0 branch July 17, 2024 20:23
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