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Merged
merged 2 commits into from
Apr 2, 2024
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arm: Add minimal support for Arm Cortex-M85 #28

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5760a6a
arm: Add support for Arm Cortex-M85 CPU.
thaoluonguw Mar 5, 2024
d1b1cc5
arm: Remove pacbti in cortex-m85
thaoluonguw Mar 12, 2024
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14 changes: 14 additions & 0 deletions gcc/config/arm/arm-cpus.in
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Expand Up @@ -1638,6 +1638,20 @@ begin cpu cortex-m55
vendor 41
end cpu cortex-m55

begin cpu cortex-m85
cname cortexm85
tune flags LDSCHED
architecture armv8.1-m.main+mve.fp+fp.dp
option nomve.fp remove mve_float
option nomve remove mve mve_float
option nofp remove ALL_FP mve_float
option nodsp remove MVE mve_float
isa quirk_no_asmcpu quirk_vlldm
costs v7m
part 0xd23
vendor 41
end cpu cortex-m85

# V8 R-profile implementations.
begin cpu cortex-r52
cname cortexr52
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3 changes: 3 additions & 0 deletions gcc/config/arm/arm-tables.opt
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Expand Up @@ -285,6 +285,9 @@ Enum(processor_type) String(cortex-m55) Value( TARGET_CPU_cortexm55)
EnumValue
Enum(processor_type) String(cortex-r52) Value( TARGET_CPU_cortexr52)

EnumValue
Enum(processor_type) String(cortex-m85) Value( TARGET_CPU_cortexm85)

EnumValue
Enum(processor_type) String(cortex-r52plus) Value( TARGET_CPU_cortexr52plus)

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2 changes: 1 addition & 1 deletion gcc/config/arm/arm-tune.md
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Expand Up @@ -49,6 +49,6 @@
cortexa710,cortexx1,neoversen1,
cortexa75cortexa55,cortexa76cortexa55,neoversev1,
neoversen2,cortexm23,cortexm33,
cortexm35p,cortexm55,cortexr52,
cortexm35p,cortexm55,cortexm85,cortexr52,
cortexr52plus"
(const (symbol_ref "((enum attr_tune) arm_tune)")))
16 changes: 12 additions & 4 deletions gcc/doc/invoke.texi
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Expand Up @@ -21180,7 +21180,7 @@ Permissible names are: @samp{arm7tdmi}, @samp{arm7tdmi-s}, @samp{arm710t},
@samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, @samp{cortex-r52plus},
@samp{cortex-m0}, @samp{cortex-m0plus}, @samp{cortex-m1}, @samp{cortex-m3},
@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m23}, @samp{cortex-m33},
@samp{cortex-m35p}, @samp{cortex-m55}, @samp{cortex-x1},
@samp{cortex-m35p}, @samp{cortex-m55}, @samp{cortex-m85}, @samp{cortex-x1},
@samp{cortex-m1.small-multiply}, @samp{cortex-m0.small-multiply},
@samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4},
@samp{neoverse-n1}, @samp{neoverse-n2}, @samp{neoverse-v1}, @samp{xscale},
Expand Down Expand Up @@ -21244,14 +21244,22 @@ The following extension options are common to the listed CPUs:

@table @samp
@item +nodsp
Disable the DSP instructions on @samp{cortex-m33}, @samp{cortex-m35p}.
Disable the DSP instructions on @samp{cortex-m33}, @samp{cortex-m35p} and @samp{cortex-m85}. Also disable the M-Profile Vector Extension (MVE) integer and single precision floating-point instructions on @samp{cortex-m85}.

@item +nomve
Disable the M-Profile Vector Extension (MVE) integer and single precision
floating-point instructions on @samp{cortex-m85}.

@item +nomve.fp
Disable the M-Profile Vector Extension (MVE) single precision floating-point
instructions on @samp{cortex-m85}.

@item +nofp
Disables the floating-point instructions on @samp{arm9e},
@samp{arm946e-s}, @samp{arm966e-s}, @samp{arm968e-s}, @samp{arm10e},
@samp{arm1020e}, @samp{arm1022e}, @samp{arm926ej-s},
@samp{arm1026ej-s}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8},
@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m33} and @samp{cortex-m35p}.
@samp{cortex-m4}, @samp{cortex-m7}, @samp{cortex-m33} and @samp{cortex-m35p} and @samp{cortex-m85}.
Disables the floating-point and SIMD instructions on
@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7},
@samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12},
Expand Down Expand Up @@ -21591,7 +21599,7 @@ Development Tools Engineering Specification", which can be found on
Mitigate against a potential security issue with the @code{VLLDM} instruction
in some M-profile devices when using CMSE (CVE-2021-365465). This option is
enabled by default when the option @option{-mcpu=} is used with
@code{cortex-m33}, @code{cortex-m35p} or @code{cortex-m55}. The option
@code{cortex-m33}, @code{cortex-m35p} or @code{cortex-m55}, @code{cortex-m85}. The option
@option{-mno-fix-cmse-cve-2021-35465} can be used to disable the mitigation.

@item -mstack-protector-guard=@var{guard}
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23 changes: 23 additions & 0 deletions gcc/testsuite/gcc.target/arm/multilib.exp
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Expand Up @@ -521,6 +521,11 @@ if {[multilib_config "rmprofile"] } {
{-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp"
{-mcpu=cortex-m85+nopacbti -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m85+nopacbti+nofp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m85+nopacbti+nomve -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m85+nopacbti+nodsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m85+nopacbti+nomve.fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp"
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Obviously, these are not going to pass the test; but, we might as well leave it to keep the diff minimal from the original commit.

{-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard"
{-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard"
Expand All @@ -546,6 +551,15 @@ if {[multilib_config "rmprofile"] } {
{-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard"
{-mcpu=cortex-m85+nopacbti -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m85+nopacbti+nomve -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m85+nopacbti+nodsp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m85+nopacbti+nofp -mfpu=auto -mfloat-abi=hard} "thumb/v8.1-m.main+mve/hard"
{-mcpu=cortex-m85+nopacbti+nomve.fp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard"
{-mcpu=cortex-m85 -mbranch-protection=standard -mfpu=auto -mfloat-abi=hard} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard"
{-mcpu=cortex-m85+nomve.fp -mbranch-protection=standard -mfpu=auto -mfloat-abi=hard} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard"
{-mcpu=cortex-m85+nomve -mbranch-protection=standard -mfpu=auto -mfloat-abi=hard} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard"
{-mcpu=cortex-m85+nodsp -mbranch-protection=standard -mfpu=auto -mfloat-abi=hard} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard"
{-mcpu=cortex-m0 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m1 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp"
{-mcpu=cortex-m3 -mfpu=auto -mfloat-abi=softfp} "thumb/v7-m/nofp"
Expand Down Expand Up @@ -595,6 +609,15 @@ if {[multilib_config "rmprofile"] } {
{-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp"
{-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp"
{-mcpu=cortex-m85+nopacbti+nofp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main/nofp"
{-mcpu=cortex-m85+nopacbti -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m85+nopacbti+nomve -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m85+nopacbti+nodsp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m85+nopacbti+nomve.fp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp"
{-mcpu=cortex-m85 -mbranch-protection=standard -mfpu=auto -mfloat-abi=softfp} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/softfp"
{-mcpu=cortex-m85+nomve.fp -mbranch-protection=standard -mfpu=auto -mfloat-abi=softfp} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/softfp"
{-mcpu=cortex-m85+nomve -mbranch-protection=standard -mfpu=auto -mfloat-abi=softfp} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/softfp"
{-mcpu=cortex-m85+nodsp -mbranch-protection=standard -mfpu=auto -mfloat-abi=softfp} "thumb/v8.1-m.main+pacbti+dp/mbranch-protection/softfp"
{-march=armv6-m -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp"
{-march=armv7-m -mfpu=auto -mfloat-abi=soft} "thumb/v7-m/nofp"
{-march=armv7e-m -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp"
Expand Down