Skip to content

Commit c15ff10

Browse files
manuarguemmahadevan108
authored andcommitted
boards: arm: mr_canhubk3: add docs
Document current support for mr_canhubk3 board. Signed-off-by: Manuel Argüelles <[email protected]>
1 parent 405160c commit c15ff10

File tree

2 files changed

+193
-0
lines changed

2 files changed

+193
-0
lines changed
Loading

boards/arm/mr_canhubk3/doc/index.rst

+193
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,193 @@
1+
.. _mr_canhubk3:
2+
3+
NXP MR-CANHUBK3
4+
###############
5+
6+
Overview
7+
********
8+
9+
`NXP MR-CANHUBK3`_ is an evaluation board for mobile robotics applications such
10+
as autonomous mobile robots (AMR) and automated guided vehicles (AGV). It
11+
features an `NXP S32K344`_ general-purpose automotive microcontroller based on
12+
an Arm Cortex-M7 core (Lock-Step).
13+
14+
.. image:: img/mr_canhubk3_top.jpg
15+
:align: center
16+
:alt: NXP MR-CANHUBK3 (TOP)
17+
18+
Hardware
19+
********
20+
21+
- NXP S32K344
22+
- Arm Cortex-M7 (Lock-Step), 160 MHz (Max.)
23+
- 4 MB of program flash, with ECC
24+
- 320 KB RAM, with ECC
25+
- Ethernet 100 Mbps, CAN FD, FlexIO, QSPI
26+
- 12-bit 1 Msps ADC, 16-bit eMIOS timer
27+
28+
- `NXP FS26 Safety System Basis Chip`_
29+
30+
- Interfaces:
31+
- Console UART
32+
- 6x CAN FD
33+
- 100Base-T1 Ethernet
34+
- DroneCode standard JST-GH connectors and I/O headers for I2C, SPI, GPIO,
35+
PWM, etc.
36+
37+
More information about the hardware and design resources can be found at
38+
`NXP MR-CANHUBK3`_ website.
39+
40+
Supported Features
41+
==================
42+
43+
The ``mr_canhubk3`` board configuration supports the following hardware features:
44+
45+
============ ========== ================================
46+
Interface Controller Driver/Component
47+
============ ========== ================================
48+
SIUL2 on-chip | pinctrl
49+
| gpio
50+
| external interrupt controller
51+
LPUART on-chip serial
52+
============ ========== ================================
53+
54+
The default configuration can be found in the Kconfig file
55+
:zephyr_file:`boards/arm/mr_canhubk3/mr_canhubk3_defconfig`.
56+
57+
Connections and IOs
58+
===================
59+
60+
Each GPIO port is divided into two banks: low bank, from pin 0 to 15, and high
61+
bank, from pin 16 to 31. For example, ``PTA2`` is the pin 2 of ``gpioa_l`` (low
62+
bank), and ``PTA20`` is the pin 4 of ``gpioa_h`` (high bank).
63+
64+
LEDs
65+
----
66+
67+
The MR-CANHUBK3 board has one user RGB LED:
68+
69+
======================= ===== ===== ===================================
70+
Devicetree node Color Pin Pin Functions
71+
======================= ===== ===== ===================================
72+
led0 / user_led1_red Red PTE14 FXIO D7 / EMIOS0 CH19
73+
led1 / user_led1_green Green PTA27 FXIO D5 / EMIOS1 CH10 / EMIOS2 CH10
74+
led2 / user_led1_blue Blue PTE12 FXIO D8 / EMIOS1 CH5
75+
======================= ===== ===== ===================================
76+
77+
The user can control the LEDs in any way. An output of ``0`` illuminates the LED.
78+
79+
Buttons
80+
-------
81+
82+
The MR-CANHUBK3 board has two user buttons:
83+
84+
======================= ===== ===== ==============
85+
Devicetree node Label Pin Pin Functions
86+
======================= ===== ===== ==============
87+
sw0 / user_button_1 SW1 PTD15 EIRQ31
88+
sw0 / user_button_2 SW2 PTA25 EIRQ5 / WKPU34
89+
======================= ===== ===== ==============
90+
91+
System Clock
92+
============
93+
94+
The Arm Cortex-M7 (Lock-Step) are configured to run at 160 MHz.
95+
96+
Serial Console
97+
==============
98+
99+
By default, the serial console is provided through ``lpuart2`` on the 7-pin
100+
DCD-LZ debug connector ``P6``.
101+
102+
========= ===== ============
103+
Connector Pin Pin Function
104+
========= ===== ============
105+
P6.2 PTA9 LPUART2_TX
106+
P6.3 PTA8 LPUART2_RX
107+
========= ===== ============
108+
109+
FS26 SBC Watchdog
110+
=================
111+
112+
On normal operation after the board is powered on, there is a window of 256 ms
113+
on which the FS26 watchdog must be serviced with a good token refresh, otherwise
114+
the watchdog will signal a reset to the MCU. Currently there is no driver for
115+
the watchdog so the FS26 must be started in debug mode following these steps:
116+
117+
1. Power off the board.
118+
2. Remove the jumper ``JP1`` (pins 1-2 open), which is connected by default.
119+
3. Power on the board.
120+
4. Reconnect the jumper ``JP1`` (pins 1-2 shorted).
121+
122+
Programming and Debugging
123+
*************************
124+
125+
Applications for the ``mr_canhubk3`` board can be built in the usual way as
126+
documented in :ref:`build_an_application`.
127+
128+
This board configuration supports `Lauterbach TRACE32`_ and `SEGGER J-Link`_
129+
West runners for flashing and debugging applications. Follow the steps described
130+
in :ref:`lauterbach-trace32-debug-host-tools` and :ref:`jlink-debug-host-tools`,
131+
to setup the flash and debug host tools for these runners, respectively. The
132+
default runner is Lauterbach TRACE32.
133+
134+
Flashing
135+
========
136+
137+
Run the ``west flash`` command to flash the application to the board using
138+
Lauterbach TRACE32. Alternatively, run ``west flash -r jlink`` to use SEGGER
139+
J-Link.
140+
141+
The Lauterbach TRACE32 runner supports additional options that can be passed
142+
through command line:
143+
144+
.. code-block:: console
145+
146+
west flash --startup-args elfFile=<elf_path> loadTo=<flash/sram>
147+
eraseFlash=<yes/no> verifyFlash=<yes/no>
148+
149+
Where:
150+
151+
- ``<elf_path>`` is the path to the Zephyr application ELF in the output
152+
directory
153+
- ``loadTo=flash`` loads the application to the SoC internal program flash
154+
(:kconfig:option:`CONFIG_XIP` must be set), and ``loadTo=sram`` load the
155+
application to SRAM. Default is ``flash``.
156+
- ``eraseFlash=yes`` erases the whole content of SoC internal flash before the
157+
application is downloaded to either Flash or SRAM. This routine takes time to
158+
execute. Default is ``no``.
159+
- ``verifyFlash=yes`` verify the SoC internal flash content after programming
160+
(use together with ``loadTo=flash``). Default is ``no``.
161+
162+
For example, to erase and verify flash content:
163+
164+
.. code-block:: console
165+
166+
west flash --startup-args elfFile=build/zephyr/zephyr.elf loadTo=flash eraseFlash=yes verifyFlash=yes
167+
168+
Debugging
169+
=========
170+
171+
Run the ``west debug`` command to launch the Lauterbach TRACE32 software
172+
debugging interface. Alternatively, run ``west debug -r jlink`` to start a
173+
command line debugging session using SEGGER J-Link.
174+
175+
References
176+
**********
177+
178+
.. target-notes::
179+
180+
.. _NXP MR-CANHUBK3:
181+
https://www.nxp.com/design/development-boards/automotive-development-platforms/s32k-mcu-platforms/s32k344-evaluation-board-for-mobile-robotics-incorporating-100baset1-and-six-can-fd:MR-CANHUBK344
182+
183+
.. _NXP S32K344:
184+
https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k3-microcontrollers-for-automotive-general-purpose:S32K3
185+
186+
.. _NXP FS26 Safety System Basis Chip:
187+
https://www.nxp.com/products/power-management/pmics-and-sbcs/safety-sbcs/safety-system-basis-chip-with-low-power-fit-for-asil-d:FS26
188+
189+
.. _Lauterbach TRACE32:
190+
https://www.lauterbach.com
191+
192+
.. _SEGGER J-Link:
193+
https://wiki.segger.com/NXP_S32K3xx

0 commit comments

Comments
 (0)