arch: arm: protect r0 in z_arch_switch_to_main_thread() inline ASM #20094
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This has not been shown to be a bug with GCC. But IMHO, it is worth the fix; it does not seem to have a compile- or run-time cost. GCC will just pick any other low register to store the stack pointer value, and pass it to PSP. |
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Yeah, r0 does need to be in clobber. Technically r1, r2, and r3 should be listed as clobbers too. (It's not necessary only because there's nothing reachable after the asm statement.)
I believe that if you move the unconditional movs r1, #0 on line 446 up to line 434 you can eliminate the instruction from line 440, which saves 4 bytes.
Adding r0 to the clobber list in the inline ASM block of z_arch_switch_to_main_thread(). This instructs assembler to not use r0 to store ASM expression operands, e.g. in the subsequent instruction, msr PSR %1. We also do a minor optimization with the clearing of R1 before jumping to main. Signed-off-by: Ioannis Glaropoulos <[email protected]>
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Done, thanks for reviewing this @pabigot . |
Adding r0 to the clobber list in the inline ASM block of
z_arch_switch_to_main_thread(). This instructs assembler
to not use r0 to store ASM expression operands, e.g. in
the subsequent instruction, msr PSR %1.
Signed-off-by: Ioannis Glaropoulos [email protected]
Fixes #16900