Add support for ARM architected timer #20175
Conversation
ARM cores may have a per-core architected timer, which provides per-cpu timers, attached to a GIC to deliver its per-processor interrupts via PPIs. This is the most common case supported by QEMU in the virt platform. This patch introduces support for this timer abstracting the way the timer registers are actually accessed. This is needed because different architectures (for example ARMv7-R vs ARMv8-A) use different registers and even the same architecture (ARMv8-A) can actually use different timers (ELx physical timers vs ELx virtual timers). So we introduce the common driver here but the actual SoC / architecture / board must provide the three helpers (arm_arch_timer_set_compare(), arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file imported through the arch/cpu.h header file. Signed-off-by: Carlo Caione <[email protected]>
carlocaione
requested review from
carlescufi,
galak,
ioannisg,
MaureenHelm and
nashif
as code owners
zephyrbot
added
area: Devicetree
area: Timer
|
@carlocaione Would it be possible for you to write some tests for these (GIC and generic timer) running on qemu (possibly qemu_cortex_r5, which is Zynq)? I think one of the major barriers to getting these merged is that there is no way for third parties to verify that these are actually functional as intended. |
There was a problem hiding this comment.
CMSIS-Core(A) provides the same set of functions, so no shim of any sort would be required. CMSIS-Core(A) can be added to the repository in the future if necessary as well. As for ARMv8-A, we could either patch CMSIS-Core(A), or write a separate driver header that maps to CMSIS Generic Timer-related functions. Nevermind, it turns out AArch64 is doing something otherworldly.
|
@carlocaione I just tried running this on qemu_cortex_r5 (xilinx_zynqmp) and found that it is unable to boot (faults at 0x3928 = Generic Timer CP15 configuration instruction). So I took a quick glance at the Zynq UltraScale+ TRM, and it seems like the RPU (Cortex-R5) does not implement Generic Timer (which also aligns with my previous knowledge that, for ARMv7, Generic Timer is only available on Cortex-R7 and -R8). Only APU implements Generic Timer and other arch timers (private timer and global timer). Am I looking at wrong docs or have you not tested this?! |
As I wrote in the commit message I tested this on my ARMv8 (AArch64) branch where it works fine. The Cortex-R commit wast not tested and just to explain how to hookup the helpers, we can not merge that. On ARMv8 I'm of course using different helpers. |
|
@stephanosio I'm going to drop the Cortex-R commit, so we can discuss on the generic driver only. |
carlocaione
force-pushed
the
arm_arm_timer
branch
from
b63cbf5 to
64aaee4
Compare
|
@carlocaione Just wondering- have you tried running the following tests with this driver? I tried to see if I can get it to work using the arm64_clean branch on your fork, but compilation fails with the following error: |
OMG, that is definitely not a branch to use and definitely not to be public. Forgot to make it private. I'm currently cleaning it up. Sorry you had to look at that code :) Anyway if you want that branch to compile use And yes, actually those tests have problems with the driver. Weird. The basic test case I was using was working fine. I probably rushed this driver. Let me close this PR and rework this better to not waste anyone else time on this. |
cc @stephanosio @bbolen @timork @vladimir-podbrezsky
This is the ARM architected timer driver. This has been tested on my ARMv8 / AArch64 working branch (using the QEMU virt platform) and it is working fine.
BTW this depends on #19860