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arch: arm: Fix Cortex-R power management interrupt handling #21758

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merged 1 commit into from
Jan 8, 2020
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arch: arm: Fix Cortex-R power management interrupt handling #21758

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11 changes: 11 additions & 0 deletions arch/arm/core/aarch32/isr_wrapper.S
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Original file line number Diff line number Diff line change
Expand Up @@ -77,7 +77,15 @@ SECTION_FUNC(TEXT, _isr_wrapper)
* state is not interrupted. In each case, z_sys_power_save_idle_exit
* is called with interrupts disabled.
*/

/*
* FIXME: Remove the Cortex-M conditional compilation checks for `cpsid i`
* and `cpsie i` after the Cortex-R port is updated to support
* interrupt nesting. For more details, refer to the issue #21758.
*/
#if defined(CONFIG_CPU_CORTEX_M)
cpsid i /* PRIMASK = 1 */
#endif

/* is this a wakeup from idle ? */
ldr r2, =_kernel
Expand Down Expand Up @@ -110,9 +118,12 @@ _idle_state_cleared:
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

#if defined(CONFIG_CPU_CORTEX_M)
cpsie i /* re-enable interrupts (PRIMASK = 0) */
#endif

#endif /* CONFIG_SYS_POWER_MANAGEMENT */

#if defined(CONFIG_CPU_CORTEX_M)
mrs r0, IPSR /* get exception number */
#endif
Expand Down