NXP: Enable eDMA on KE1xF SoC series

[henrikbrixandersen]

This series of commits enables eDMA on the NXP KE1xF SoC series and on the NXP TWR-KE18F development board.

[henrikbrixandersen]

I am putting this PR in draft mode for now due to #26812 also affecting the KE1xF.

[hakehuang]

LGTM

[hakehuang]

the NOCACHE_MEMORY better not be disablable by users, in RT series without this, user need control the cache by them self, do you sure you want this?

[henrikbrixandersen]

Problem here is, that the Kinetis KE1xF series has CONFIG_HAS_MCUX_CACHE=y but CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT=n, so the dependency would not be fulfilled by the select statement.

The imply statement is like select except that it honours dependencies. Thus for SoCs with CONFIG_HAS_MCUX_CACHE=y that fulfils the dependencies for CONFIG_NOCACHE_MEMORY=y the result will be the same as with the select statement.

[hakehuang]

log for two dma cases on ke18

`

------------------------- Target.main.com118 -------------------------
*** Booting Zephyr OS build zephyr-v2.3.0-997-g835113ee984a ***
Running test suite dma_m2m_test

START - test_dma_m2m_chan0_burst8
Preparing DMA Controller: Chan_ID=0, BURST_LEN=1
Starting the transfer
DMA transfer done
It is harder to be kind than to be wise........
PASS - test_dma_m2m_chan0_burst8

START - test_dma_m2m_chan1_burst8
Preparing DMA Controller: Chan_ID=1, BURST_LEN=1
Starting the transfer
DMA transfer done
It is harder to be kind than to be wise........
PASS - test_dma_m2m_chan1_burst8

START - test_dma_m2m_chan0_burst16
Preparing DMA Controller: Chan_ID=0, BURST_LEN=2
Starting the transfer
DMA transfer done
It is harder to be kind than to be wise........
PASS - test_dma_m2m_chan0_burst16

START - test_dma_m2m_chan1_burst16
Preparing DMA Controller: Chan_ID=1, BURST_LEN=2
Starting the transfer
DMA transfer done
It is harder to be kind than to be wise........
PASS - test_dma_m2m_chan1_burst16

Test suite dma_m2m_test succeeded

PROJECT EXECUTION SUCCESSFUL

`

and if apply the fix from hakehuang/zephyr@f805872 loop_test can pass

`

*** Booting Zephyr OS build zephyr-v2.3.0-997-g835113ee984a ***
DMA memory to memory transfer started on DMA_0
Preparing DMA Controller
Starting the transfer and waiting for 1 second
TX data: The quick brown fox jumps over the lazy dog ....
block_size 48
Each RX buffer should contain the full TX buffer string.
TX data: The quick brown fox jumps over the lazy dog ....
RX data Loop 0: The quick brown fox jumps over the lazy dog ....
RX data Loop 1: The quick brown fox jumps over the lazy dog ....
RX data Loop 2: The quick brown fox jumps over the lazy dog ....
RX data Loop 3: The quick brown fox jumps over the lazy dog ....
RX data Loop 4: The quick brown fox jumps over the lazy dog ....
Finished: DMA

`

[henrikbrixandersen]

Moved out of draft since @hakehuang has found the cause for the DMA test failure reported in #26812. It is not related to the eDMA support on the KE1xF.

[MaureenHelm]

Can you also add dma to the supported list in boards/arm/twr_ke18f/twr_ke18f.yaml?

[henrikbrixandersen]

Can you also add dma to the supported list in boards/arm/twr_ke18f/twr_ke18f.yaml?

@MaureenHelm Thanks, added.