Skip to content

[RFC][DNM]Pinmux configuration code generated from Device tree #5021

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 10 commits into from
4 changes: 4 additions & 0 deletions boards/arm/disco_l475_iot1/disco_l475_iot1.dts
Original file line number Diff line number Diff line change
Expand Up @@ -35,11 +35,15 @@
&i2c1 {
status = "ok";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_pins_a>;
pinctrl-names = "default";
};

&i2c2 {
status = "ok";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c2_pins_a>;
pinctrl-names = "default";
};

&flash0 {
Expand Down
22 changes: 9 additions & 13 deletions boards/arm/disco_l475_iot1/pinmux.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,21 +12,11 @@

#include <pinmux/stm32/pinmux_stm32.h>

/* Include pinmux configuration generated file */
#include <st_stm32_pinmux_init.h>

/* pin assignments for Disco L475 IOT1 board */
static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_I2C_1
{STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL},
{STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA},
#endif /* CONFIG_I2C_1 */
#ifdef CONFIG_I2C_2
/* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */
{STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL},
{STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA},
#endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1
{STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},
Expand Down Expand Up @@ -54,8 +44,14 @@ static int pinmux_stm32_init(struct device *port)
{
ARG_UNUSED(port);

/* Parse pinconf array provided above */
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));

/* Parse st_stm32_pinmux_pinconf array provided */
/* in dts based generated file st_stm32_pinmux_init.h */
stm32_setup_pins(st_stm32_pinmux_pinconf,
ARRAY_SIZE(st_stm32_pinmux_pinconf));

return 0;
}

Expand Down
38 changes: 32 additions & 6 deletions boards/arm/frdm_k64f/pinmux.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,10 +8,18 @@
#include <pinmux.h>
#include <fsl_port.h>

#include "pinmux/pinmux.h"
#include "pinmux_nxp.h"

/* Include pinmux configuration generated file */
#include <nxp_kinetis_pinmux_init.h>

static int frdm_k64f_pinmux_init(struct device *dev)
{
ARG_UNUSED(dev);

struct device *port;

#ifdef CONFIG_PINMUX_MCUX_PORTA
struct device *porta =
device_get_binding(CONFIG_PINMUX_MCUX_PORTA_NAME);
Expand All @@ -33,12 +41,6 @@ static int frdm_k64f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif

#ifdef CONFIG_UART_MCUX_0
/* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif

#ifdef CONFIG_UART_MCUX_3
/* UART3 RX, TX */
pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
Expand Down Expand Up @@ -112,6 +114,30 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 19, PORT_PCR_MUX(kPORT_MuxAlt4));
#endif


/* Parse nxp_kinetis_pinmux_instances array provided */
/* in dts based generated file nxp_kinetis_pinmux_instances.h */
/* Array holds instances_pinconfig structures which contain */
/* pin configuration for each pinmux instance */
for (int i = 0; i < ARRAY_SIZE(nxp_kinetis_pinmux_instances); i++) {

int size = nxp_kinetis_pinmux_instances[i].instance_npins;
const struct pin_config *pinconf =
nxp_kinetis_pinmux_instances[i].instance_pins;

/* For each pinmux instance, get device binding */
/* and set each pin individually */

port =
device_get_binding(nxp_kinetis_pinmux_instances[i].instance);

for (int p = 0; p < size; p++) {
pinmux_pin_set(port,
pinconf[p].pin_num,
pinconf[p].mode);
}
}

return 0;
}

Expand Down
18 changes: 18 additions & 0 deletions boards/arm/frdm_k64f/pinmux_nxp.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef PINMUX_H
#define PINMUX_H

/* Struct used to hold pinmux instances configuration */
struct instances_pinconfig {
char *instance;
const struct pin_config *instance_pins;
size_t instance_npins;
};


#endif /* PINMUX_H */
12 changes: 9 additions & 3 deletions dts/arm/nxp/nxp_k6x.dtsi
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/kinetis_sim.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/mcux-pinctrl.h>

/ {
cpus {
Expand Down Expand Up @@ -189,30 +190,32 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x40049000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
label = "porta";
};

pinmux_b: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
reg = <0x4004a000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
label = "portb";
uart0_default: uart0_default {
rx-tx {
pins = <16>, <17>;
function = <3>;
function = <MCUX_FUNC_ALT_3>;
};
};

uart0_lpm: uart0_lpm {
rx-tx {
pins = <16>, <17>;
function = <0>;
function = <MCUX_FUNC_ALT_0>;
};
};

spi0_default: spi0_default {
miso-mosi-clk {
pins = <10>, <9>;
function = <2>;
function = <MCUX_FUNC_ALT_2>;
};
};
};
Expand All @@ -221,18 +224,21 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x4004b000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
label = "portc";
};

pinmux_d: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
reg = <0x4004c000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
label = "portd";
};

pinmux_e: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
reg = <0x4004d000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
label = "porte";
};

gpioa: gpio@400ff000 {
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nxp/nxp_kl25z.dtsi
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
#include "armv6-m.dtsi"
#include <dt-bindings/clock/kinetis_sim.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/mcux-pinctrl.h>

/ {
cpus {
Expand Down
12 changes: 9 additions & 3 deletions dts/arm/nxp/nxp_kw2xd.dtsi
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/kinetis_sim.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/mcux-pinctrl.h>

/ {
cpus {
Expand Down Expand Up @@ -136,11 +137,12 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x40049000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
label = "porta";

uart0_default: uart0_default {
rx-tx {
pins = <1>, <2>;
function = <2>;
function = <MCUX_FUNC_ALT_2>;
};
};
};
Expand All @@ -149,11 +151,12 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x4004a000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
label = "portb";

spi1_default: spi1_default {
miso-mosi-clk {
pins = <17>, <16>, <11>;
function = <2>;
function = <MCUX_FUNC_ALT_2>;
};
};
};
Expand All @@ -162,17 +165,19 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x4004b000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
label = "portc";
};

pinmux_d: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
reg = <0x4004c000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
label = "portd";

uart2_default: uart2_default {
rx-tx {
pins = <2>, <3>;
function = <3>;
function = <MCUX_FUNC_ALT_3>;
};
};
};
Expand All @@ -181,6 +186,7 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x4004d000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
label = "porte";
};

gpioa: gpio@400ff000 {
Expand Down
14 changes: 9 additions & 5 deletions dts/arm/nxp/nxp_kw40z.dtsi
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
#include "armv6-m.dtsi"
#include <dt-bindings/clock/kinetis_sim.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/mcux-pinctrl.h>

/ {
cpus {
Expand Down Expand Up @@ -94,11 +95,12 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x40049000 0xa4>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
label = "porta";

spi1_default: spi1_default {
mosi-miso-sck-pcs0 {
pins = <16>, <17>, <18>, <19>;
function = <2>;
function = <MCUX_FUNC_ALT_2>;
};
};
};
Expand All @@ -107,38 +109,40 @@
compatible = "nxp,kinetis-pinmux";
reg = <0x4004a000 0xa4>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
label = "portb";
};

pinmux_c: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
reg = <0x4004b000 0xa4>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
label = "portc";

lpuart0_default: lpuart0_default {
rx-tx {
pins = <6>, <7>;
function = <4>;
function = <MCUX_FUNC_ALT_4>;
};
};

lpuart0_alt1: lpuart0_alt1 {
rx-tx {
pins = <17>, <18>;
function = <4>;
function = <MCUX_FUNC_ALT_4>;
};
};

lpuart0_alt2: lpuart0_alt2 {
rx-tx-cts-rts {
pins = <2>, <3>, <0>, <1>;
function = <4>;
function = <MCUX_FUNC_ALT_4>;
};
};

spi0_default: spi0_default {
mosi-miso-clk-pcs0 {
pins = <18>, <17>, <16>, <19>;
function = <2>;
function = <MCUX_FUNC_ALT_2>;
};
};
};
Expand Down
Loading