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5 changes: 1 addition & 4 deletions boards/seeed/xiao_esp32s3/doc/index.rst
Original file line number Diff line number Diff line change
@@ -1,7 +1,4 @@
.. _xiao_esp32s3:

XIAO ESP32S3/XIAO ESP32S3 Sense
###############################
.. zephyr:board:: xiao_esp32s3

Overview
********
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29 changes: 29 additions & 0 deletions doc/releases/release-notes-4.0.rst
Original file line number Diff line number Diff line change
Expand Up @@ -158,10 +158,13 @@ Boards & SoC Support

* Added support for these SoC series:

* Added ESP32-C2 and ESP8684 SoC support.

* Made these changes in other SoC series:

* NXP S32Z270: Added support for the new silicon cut version 2.0. Note that the previous
versions (1.0 and 1.1) are no longer supported.
* Added ESP32 WROVER-E-N16R4 variant.

* Added support for these boards:

Expand Down Expand Up @@ -209,6 +212,7 @@ Boards & SoC Support
* :ref:`Renesas RA6E2 Fast Prototyping Board <fpb_ra6e2>` (``fpb_ra6e2``)
* :ref:`Renesas RA8T1 Evaluation Kit <mcb_ra8t1>` (``mck_ra8t1``)
* :zephyr:board:`Renode Cortex-R8 Virtual <cortex_r8_virtual>` (``cortex_r8_virtual``)
* :zephyr:board:`Seeed XIAO ESP32-S3 Sense Variant <xiao_esp32s3>`: ``xiao_esp32s3``.
* :ref:`sensry.io Ganymed Break-Out-Board (BOB) <ganymed_bob>` (``ganymed_bob``)
* :zephyr:board:`SiLabs SiM3U1xx 32-bit MCU USB Development Kit <sim3u1xx_dk>` (``sim3u1xx_dk``)
* :ref:`SparkFun Thing Plus Matter <sparkfun_thing_plus_mgm240p>` (``sparkfun_thing_plus_matter_mgm240p``)
Expand Down Expand Up @@ -294,6 +298,9 @@ Drivers and Sensors

* ADC

* Added proper ADC2 calibration entries in ESP32.
* Fixed calibration scheme in ESP32-S3.

* Battery

* CAN
Expand Down Expand Up @@ -326,6 +333,7 @@ Drivers and Sensors

* Fixed SPI NOR driver issue where wp, hold and reset pins were incorrectly initialized from
device tee when SFDP at run-time has been enabled (:github:`80383`)
* Updated all Espressif's SoC driver initialization to allow new chipsets and octal flash support.

* GNSS

Expand All @@ -340,10 +348,18 @@ Drivers and Sensors

* I2S

* Added ESP32-S3 and ESP32-C3 driver support.

* I3C

* Input

* Fixed broken ESP32 input touch sensor driver.

* Interrupt

* Updated ESP32 family interrupt allocator with proper IRQ flags and priorities.

* LED

* lp5562: added ``enable-gpios`` property to describe the EN/VCC GPIO of the lp5562.
Expand All @@ -362,6 +378,8 @@ Drivers and Sensors

* Mailbox

* Added driver support for ESP32 and ESP32-S3 SoCs.

* MDIO

* MFD
Expand Down Expand Up @@ -391,6 +409,8 @@ Drivers and Sensors

* SDHC

* Added ESP32-S3 driver support.

* Sensors

* The existing driver for the Microchip MCP9808 temperature sensor transformed and renamed
Expand Down Expand Up @@ -430,6 +450,10 @@ Drivers and Sensors

* Wi-Fi

* Added ESP32-C2 Wi-Fi support.
* Added ESP32 driver APSTA support.
* Updated ESP32 Wi-Fi driver to reflect actual negotiated PHY mode.

Networking
**********

Expand Down Expand Up @@ -547,6 +571,8 @@ Libraries / Subsystems

* Power management

* Added initial ESP32-C6 power management interface to allow light and deep-sleep features.

* Crypto

* Mbed TLS was updated to version 3.6.2 (from 3.6.0). The release notes can be found at:
Expand Down Expand Up @@ -633,6 +659,9 @@ HALs

* Espressif

* Synced HAL to version v5.1.4 to update SoCs low level files, RF libraries and
overall driver support.

MCUboot
*******

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6 changes: 3 additions & 3 deletions soc/espressif/common/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -20,16 +20,16 @@ config ESP_SIMPLE_BOOT
default y if !BOOTLOADER_MCUBOOT && !MCUBOOT
help
The Simple Boot is a booting method that doesn't need a 2nd stage bootloader.
Output is a single image that should be flashed at a offset defined by used SOC.
Output is a single image that should be flashed at an offset defined by used SOC.
Please note that this method brings the system up with all memories set-up, but
all other features, such as secure boot OTA or slots management are not available.

config ESP_HEAP_RUNTIME
bool
default y
help
Enabling this will allocate SRAM area starting by a last linked data at symbolic `_end`,
ending by a last memory location that can be safely accesed (depending on a boot mode).
Enabling this will allocate SRAM area starting from the last linked data at the symbolic `_end`,
ending at the last memory location that can be safely accessed (depending on a boot mode).
This is a memory pool used in runtime to create a new heap memory.

config ESP32_TIMER_TASK_STACK_SIZE
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