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drivers: i2s: add sai support for stm32u5xx #82945

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drivers: i2s: add sai support for stm32u5xx #82945

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@mariopaja mariopaja commented Dec 13, 2024 •
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Development status:

Board used:
B-U585I-IOT02A
Nucleo-U575

Tests (16-bit, 2-channels, 44.1KHz):

Overlays:
nucleo_u575zi_q.overlay

/ {
	aliases {
		sai1a = &sai1_a;
		sai1b = &sai1_b;
	};

	soc {
		pinctrl: pin-controller@42020000 {
			/* SAI1_A */
			/omit-if-no-ref/ sai1_mclk_a_pe2: sai1_mclk_a_pe2 {
				pinmux = <STM32_PINMUX('E', 2, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sd_a_pe6: sai1_sd_a_pe6 {
				pinmux = <STM32_PINMUX('E', 6, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_fs_a_pe4: sai1_fs_a_pe4 {
				pinmux = <STM32_PINMUX('E', 4, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sck_a_pe5: sai1_sck_a_pe5 {
				pinmux = <STM32_PINMUX('E', 5, AF13)>;
				slew-rate = "very-high-speed";
			};

			/* SAI1_B */
			/omit-if-no-ref/ sai1_sd_b_pe3: sai1_sd_b_pe3 {
				pinmux = <STM32_PINMUX('E', 3, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sck_b_pf8: sai1_sck_b_pf8 {
				pinmux = <STM32_PINMUX('F', 8, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_fs_b_pf9: sai1_fs_b_pf9 {
				pinmux = <STM32_PINMUX('F', 9, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_mclk_b_pf7: sai1_mclk_b_pf7 {
				pinmux = <STM32_PINMUX('F', 7, AF13)>;
				slew-rate = "very-high-speed";
			};
		};
	};
};

&sai1_a {
	pinctrl-0 = <&sai1_mclk_a_pe2 &sai1_sd_a_pe6
	&sai1_fs_a_pe4 &sai1_sck_a_pe5>;
	pinctrl-names = "default";
	status = "okay";
	dmas = <&gpdma1 1 36 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
	mclk-enable;
	mclk-div-enable;
};

&sai1_b {
	pinctrl-0 = <&sai1_sd_b_pe3 &sai1_sck_b_pf8 &sai1_fs_b_pf9 &sai1_mclk_b_pf7>;
	pinctrl-names = "default";
	status = "disabled";
	dmas = <&gpdma1 0 37 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
};

&gpdma1 {
	status = "okay";
};

&pll2 {
	/* 44.1KHz (-0.03% Error) */
	div-m = <1>;
	mul-n = <79>;
	div-q = <2>;
	div-r = <2>;
	div-p = <7>;
	clocks = <&clk_msis>;
	status = "okay";
};

&dac1 {
	status = "disabled";
};

b_u585i_iot02a.overlay

/ {
	aliases {
		sai1a = &sai1_a;
	};

	soc {
		pinctrl: pin-controller@42020000 {
			/omit-if-no-ref/ sai1_mclk_a_pe2: sai1_mclk_a_pe2 {
				pinmux = <STM32_PINMUX('E', 2, AF13)>;
				slew-rate = "very-high-speed";
			};
			/omit-if-no-ref/ sai1_sd_a_pe6: sai1_sd_a_pe6 {
				pinmux = <STM32_PINMUX('E', 6, AF13)>;
			};
			/omit-if-no-ref/ sai1_fs_a_pe4: sai1_fs_a_pe4 {
				pinmux = <STM32_PINMUX('E', 4, AF13)>;
			};
			/omit-if-no-ref/ sai1_sck_a_pe5: sai1_sck_a_pe5 {
				pinmux = <STM32_PINMUX('E', 5, AF13)>;
				slew-rate = "very-high-speed";
			};
		};

		sai1_a: sai1_a@40015404 {
			compatible = "st,stm32-sai";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40015404 0x20>;
			clocks = <&rcc STM32_CLOCK(APB2, 21U)>,
			         <&rcc STM32_SRC_PLL1_P SAI1_SEL(2)>;
			status = "disabled";
		};

	};

};

&sai1_a {
	pinctrl-0 = <&sai1_mclk_a_pe2 &sai1_sd_a_pe6
	&sai1_fs_a_pe4 &sai1_sck_a_pe5>;
	pinctrl-names = "default";
	status = "okay";
	dmas = <&gpdma1 1 36 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH | STM32_DMA_MEM_16BITS | STM32_DMA_PERIPH_16BITS)>;
	dma-names = "tx";
	mclk-enable;
	mclk-div-enable;
};

&gpdma1 {
	status = "okay";
};

&pll2 {
	/* 44.1KHz (-0.03% Error) */
	div-m = <1>;
	mul-n = <79>;
	div-q = <2>;
	div-r = <2>;
	div-p = <7>;
	clocks = <&clk_msis>;
	status = "okay";
};

@mariopaja mariopaja marked this pull request as ready for review December 13, 2024 06:44
@mariopaja mariopaja marked this pull request as draft December 13, 2024 06:45
@mariopaja mariopaja force-pushed the sai_hal_stm32 branch 4 times, most recently from f8ceb83 to eaa6008 Compare December 13, 2024 11:21
@mariopaja mariopaja force-pushed the sai_hal_stm32 branch 2 times, most recently from 0d5e107 to 0822bdf Compare January 30, 2025 10:33
@mariopaja mariopaja force-pushed the sai_hal_stm32 branch 4 times, most recently from 0acc7b3 to 8648fe2 Compare February 10, 2025 14:21
@mariopaja
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An update on the driver progress:

  • Nucleo U575
  • 16-bit, 2-channels, 44.1KHz
  • PCM5102

Only TX is tested, RX implementation is still ongoing

stm32u575_16bit_2ch_44khz.mov

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An update on the driver progress:

The following test is done:
SAI_TX_RX_TEST

  • B-U585I-IOT02A (TX)
  • Nucleo U575(RX-TX)
  • 16-bit, 2-channels, 44.1KHz
  • PCM5102
sai_tx_rx_test.mov

@mariopaja mariopaja force-pushed the sai_hal_stm32 branch 13 times, most recently from 92c7797 to c8f6cb9 Compare April 8, 2025 11:08
dts: arm: st: stm32u5xx add sai1 node
b5653b0 
Add SAI1 A & B nodes on STM32U5 Series

Signed-off-by: Mario Paja <[email protected]>
@mariopaja mariopaja changed the title [WIP] drivers: i2s: add sai support for stm32u5xx drivers: i2s: add sai support for stm32u5xx Apr 8, 2025
@mariopaja mariopaja force-pushed the sai_hal_stm32 branch 2 times, most recently from 9167992 to e199134 Compare April 16, 2025 12:33
drivers: i2s: add sai support for stm32u5xx
7ac5f73 
This PR adds initial sai support for STM32u5xx

Signed-off-by: Mario Paja <[email protected]>
@mariopaja mariopaja marked this pull request as ready for review April 16, 2025 12:53
@github-actions github-actions bot requested a review from djiatsaf-st April 16, 2025 12:54
erwango
erwango requested changes Apr 22, 2025
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I didn't go into details but this is a great work. I have few initial comments but the main request would be to add a way to build and use this driver in tree (add a (simple) sample if missing or a board configuration to make use of existing sample)

dts/arm/st/u5/stm32u5.dtsi
@@ -495,6 +495,26 @@
status = "disabled";
};

sai1_a: sai1_a@40015404 {
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Suggested change
sai1_a: sai1_a@40015404 {
sai1_a: sai@40015404 {

Apply below as well

drivers/i2s/Kconfig.stm32
select USE_STM32_HAL_DMA
select USE_STM32_HAL_DMA_EX
select USE_STM32_HAL_SAI
select USE_STM32_LL_DLYB if SOC_SERIES_STM32U5X
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I don't see use of DLYB LL below. To be cleaned up ?

drivers/i2s/i2s_stm32_sai.c
uint32_t dma_channel;
struct dma_config dma_cfg;

/* STM32U5 HAL SAI */
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Is this really U5 specific ?

drivers/i2s/i2s_stm32_sai.c
stream->mem_block = item.buffer;
stream->mem_block_len = item.size;

sys_cache_data_flush_range(stream->mem_block, stream->mem_block_len);
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Note: This doesn't have any effect w/o #88585.

JarmouniA
JarmouniA suggested changes Apr 22, 2025
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dts/bindings/i2s/st,stm32-sai.yaml
description: |
Synchronous mode.
The SAI controller is configured to work in synchronous mode.
This property is used to enable the SAI controller to work in synchronous mode.
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Last line is redundant, to be removed.

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@pdgendt pdgendt pdgendt left review comments

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