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drivers: gpio: gpio_dw: add optional API to set data and control source #85438

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drivers: gpio: gpio_dw: add optional API to set data and control source #85438

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6fffdb9
drivers: gpio: gpio_dw: add optional API to set data and control source
xodus7 Feb 8, 2025
bb5e615
drivers: gpio: gpio_dw: move base_addr to config struct
xodus7 Feb 15, 2025
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83 changes: 56 additions & 27 deletions drivers/gpio/gpio_dw.c
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Original file line number Diff line number Diff line change
Expand Up @@ -171,10 +171,9 @@ static int gpio_dw_pin_interrupt_configure(const struct device *port,
enum gpio_int_mode mode,
enum gpio_int_trig trig)
{
struct gpio_dw_runtime *context = port->data;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t dir_port = dw_get_dir_port(port_base_addr);
uint32_t data_port = dw_get_data_port(port_base_addr);
uint32_t dir_reg;
Expand Down Expand Up @@ -235,10 +234,9 @@ static int gpio_dw_pin_interrupt_configure(const struct device *port,
static inline void dw_pin_config(const struct device *port,
uint32_t pin, int flags)
{
struct gpio_dw_runtime *context = port->data;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t dir_port = dw_get_dir_port(port_base_addr);
bool pin_is_output, need_debounce;

Expand Down Expand Up @@ -303,9 +301,9 @@ static inline int gpio_dw_config(const struct device *port,

static int gpio_dw_port_get_raw(const struct device *port, uint32_t *value)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t ext_port = dw_get_ext_port(port_base_addr);

*value = dw_read(base_addr, ext_port);
Expand All @@ -316,9 +314,9 @@ static int gpio_dw_port_get_raw(const struct device *port, uint32_t *value)
static int gpio_dw_port_set_masked_raw(const struct device *port,
uint32_t mask, uint32_t value)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t data_port = dw_get_data_port(port_base_addr);
uint32_t pins;

Expand All @@ -331,9 +329,9 @@ static int gpio_dw_port_set_masked_raw(const struct device *port,

static int gpio_dw_port_set_bits_raw(const struct device *port, uint32_t mask)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t data_port = dw_get_data_port(port_base_addr);
uint32_t pins;

Expand All @@ -347,9 +345,9 @@ static int gpio_dw_port_set_bits_raw(const struct device *port, uint32_t mask)
static int gpio_dw_port_clear_bits_raw(const struct device *port,
uint32_t mask)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t data_port = dw_get_data_port(port_base_addr);
uint32_t pins;

Expand All @@ -362,9 +360,9 @@ static int gpio_dw_port_clear_bits_raw(const struct device *port,

static int gpio_dw_port_toggle_bits(const struct device *port, uint32_t mask)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
uint32_t port_base_addr = context->base_addr;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_base_addr = config->base_addr;
uint32_t data_port = dw_get_data_port(port_base_addr);
uint32_t pins;

Expand All @@ -388,7 +386,8 @@ static inline int gpio_dw_manage_callback(const struct device *port,
static void gpio_dw_isr(const struct device *port)
{
struct gpio_dw_runtime *context = port->data;
uint32_t base_addr = dw_base_to_block_base(context->base_addr);
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t int_status;

int_status = dw_read(base_addr, INTSTATUS);
Expand All @@ -399,6 +398,38 @@ static void gpio_dw_isr(const struct device *port)
}
#endif /* DT_ANY_INST_HAS_PROP_STATUS_OKAY(interrupts) */

int gpio_dw_set_hw_mode(const struct device *port, gpio_pin_t pin, bool hw_mode)
{
const struct gpio_dw_config *config = port->config;
uint32_t base_addr = dw_base_to_block_base(config->base_addr);
uint32_t port_id = dw_derive_port_from_base(config->base_addr);
uint32_t ctl_port;

__ASSERT((config->common.port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
"Unsupported pin");

/* 4-port GPIO implementation translates from base address to port */
switch (port_id) {
case 1:
ctl_port = SWPORTB_CTL;
break;
case 2:
ctl_port = SWPORTC_CTL;
break;
case 3:
ctl_port = SWPORTD_CTL;
break;
case 0:
default:
ctl_port = SWPORTA_CTL;
break;
}

dw_set_bit(base_addr, ctl_port, pin, hw_mode);

return 0;
}

static DEVICE_API(gpio, api_funcs) = {
.pin_configure = gpio_dw_config,
.port_get_raw = gpio_dw_port_get_raw,
Expand All @@ -412,13 +443,12 @@ static DEVICE_API(gpio, api_funcs) = {

static int gpio_dw_initialize(const struct device *port)
{
struct gpio_dw_runtime *context = port->data;
const struct gpio_dw_config *config = port->config;
uint32_t base_addr;

if (dw_interrupt_support(config)) {

base_addr = dw_base_to_block_base(context->base_addr);
base_addr = dw_base_to_block_base(config->base_addr);

/* interrupts in sync with system clock */
dw_set_bit(base_addr, INT_CLOCK_SYNC, LS_SYNC_POS, 1);
Expand Down Expand Up @@ -455,14 +485,13 @@ static int gpio_dw_initialize(const struct device *port)
.common = { \
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
}, \
.base_addr = DT_INST_REG_ADDR(n), \
.irq_num = COND_CODE_1(DT_INST_IRQ_HAS_IDX(n, 0), (DT_INST_IRQN(n)), (0)), \
.ngpios = DT_INST_PROP(n, ngpios), \
.config_func = gpio_config_##n##_irq, \
}; \
\
static struct gpio_dw_runtime gpio_##n##_runtime = { \
.base_addr = DT_INST_REG_ADDR(n), \
}; \
static struct gpio_dw_runtime gpio_##n##_runtime; \
\
DEVICE_DT_INST_DEFINE(n, gpio_dw_initialize, NULL, &gpio_##n##_runtime, \
&gpio_dw_config_##n, PRE_KERNEL_1, \
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpio/gpio_dw.h
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ typedef void (*gpio_config_irq_t)(const struct device *port);
struct gpio_dw_config {
/* gpio_driver_config needs to be first */
struct gpio_driver_config common;
uint32_t base_addr;
uint32_t ngpios;
uint32_t irq_num; /* set to 0 if GPIO port cannot interrupt */
gpio_config_irq_t config_func;
Expand All @@ -28,7 +29,6 @@ struct gpio_dw_config {
struct gpio_dw_runtime {
/* gpio_driver_data needs to be first */
struct gpio_driver_data common;
uint32_t base_addr;
sys_slist_t callbacks;
};

Expand Down
36 changes: 36 additions & 0 deletions include/zephyr/drivers/gpio/gpio_dw.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
/*
* Copyright Meta Platforms, Inc. and its affiliates.
*
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_DW_H_
#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_DW_H_

#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/types.h>

#ifdef __cplusplus
extern "C" {
#endif

/**
* @brief Enable data and control source for a pin.
*
* Configures a pin to be controlled by software or hardware data source (if
* supported).
*
* @param port Pointer to the device structure for the driver instance.
* @param pin Pin number.
* @param hw_mode If true set pin to HW control mode.
*
* @retval 0 If successful.
*/
int gpio_dw_set_hw_mode(const struct device *port, gpio_pin_t pin, bool hw_mode);
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Will this be called once per pin? or the mode can be changed many times?

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Yes, once per pin, it's basically a binary pinmux and either SW (GPIO) or HW controlled.


#ifdef __cplusplus
}
#endif

#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_DW_H_ */
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