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Merged
merged 1 commit into from
Apr 25, 2025

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DerekSnell
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@DerekSnell DerekSnell commented Mar 25, 2025

Another board for the MCXN947 SOC, very similar to FRDM-MCXN947. Nearly all of these files were copied from the FRDM-MCXN947 board.

Sharing as a draft until more tests are validated.

Using mcuboot with the qspi board variant requires mcu-tools/mcuboot#2246 . And then this build command works well:

west build -b mcx_n9xx_evk//cpu0/qspi samples/basic/blinky --sysbuild --pristine -- -DSB_CONFIG_BOOTLOADER_MCUBOOT=y

Samples and tests tested on this board:

  • samples/basic/blinky
  • samples/basic/button

Known Issues:

@DerekSnell
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@hakehuang , can you please run your tests on this new board? Thank you

@DerekSnell DerekSnell force-pushed the mcx_n9xx_evk branch 2 times, most recently from f5aafa2 to 7d2a090 Compare March 25, 2025 16:54
@hakehuang
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@hakehuang , can you please run your tests on this new board? Thank you

@DerekSnell sure, I kick a full testing, will feedback once done in 1 day.

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Resolved build errors found with Twister.
Tested:

  • CPU0
    • samples/sensor/mcux_lpcmp
    • samples/subsys/usb/cdc_acm, both USBHS (default) and USBFS
    • tests/drivers/uart/uart_basic_api/drivers.uart.basic_api.cdc_acm
  • CPU1
    • samples/basic/threads
    • tests/drivers/build_all/led/drivers.led.build
    • tests/drivers/gpio/gpio_api_1pin
  • CPU0/QSPI
    • west build -b mcx_n9xx_evk//cpu0/qspi samples/basic/blinky --sysbuild – -DSB_CONFIG_BOOTLOADER_MCUBOOT=y

@DerekSnell
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Rebased to use major NXL_HAL update in #84423 .

@hakehuang
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hakehuang commented Mar 31, 2025

Rebased to use major NXL_HAL update in #84423 .

All build and board test PASS

pinctrl-0 = <&pinmux_usdhc0>;
pinctrl-1 = <&pinmux_usdhc0>;
pinctrl-2 = <&pinmux_usdhc0>;
cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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according to the schematic P0_11/SD_VDDEN-SD_CARD need to pull high
pwr-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;

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Thanks @hakehuang , tests/subsys/fs/fat_fs_api/filesystem.fat.api.sdmmc passes now.

kartben
kartben previously requested changes Apr 1, 2025
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More tests and samples confirmed:

  • samples/sensor/thermometer for I3C
  • tests/drivers/hwinfo/api
  • tests/drivers/rtc
  • samples/net/dhcpv4_client
  • samples/drivers/display
  • samples/modules/lvgl/demos
  • samples/sensor/mcux_lpcmp
  • samples/subsys/ipc/openamp --sysbuild
  • samples/drivers/dac
  • tests/subsys/fs/fat_fs_api/filesystem.fat.api.sdmmc
  • tests/drivers/i2s/i2s_speed

* LPI2C1 SCL(J2-12, P1_25/FC1_P1) --> LPI2C2 SCL(J2-20, P4_1/FC2_P1)
* LPI2C1 SDA(J2-8, P1_24/FC1_P0) --> LPI2C2 SDA(J2-18, P4_0/FC2_P0)
* LPI2C1 SCL(J2-12, P0_25/FC1_P1) --> LPI2C2 SCL(J2-20, P4_1/FC2_P1)
* LPI2C1 SDA(J2-8, P0_24/FC1_P0) --> LPI2C2 SDA(J2-18, P4_0/FC2_P0)
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would this be better to move to another pr?

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Good point, @hakehuang . I removed from this PR and submitted #88837

* LPI2C1 SCL(J2-12, P1_25/FC1_P1) --> LPI2C2 SCL(J2-20, P4_1/FC2_P1)
* LPI2C1 SDA(J2-8, P1_24/FC1_P0) --> LPI2C2 SDA(J2-18, P4_0/FC2_P0)
* LPI2C1 SCL(J2-12, P0_25/FC1_P1) --> LPI2C2 SCL(J2-20, P4_1/FC2_P1)
* LPI2C1 SDA(J2-8, P0_24/FC1_P0) --> LPI2C2 SDA(J2-18, P4_0/FC2_P0)
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same here

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removed and submitted #88837

- Populate JP16 and JP20
- Short BCLK JP20-pin3 (SAI1_RX_BCLK/P3_18) to JP20-pin1 (SAI1_TX_BCLK/P3_16)
- SHort SYNC JP16-pin3 (SAI1_RX_FS /P3_19) to JP16-pin1 (SAI1_TX_FS /P3_17)
- Short Data J20-pin14 (SAI1_RXD0 /P2_9) to JP20-pin13 (SAI1_TXD0 /P2_8)
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@hakehuang hakehuang Apr 14, 2025

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Short Data J20-pin14 (SAI1_RXD0 /P2_9) to J20-pin13 (SAI1_TXD0 /P2_8)
and it fails for my board

*** Booting Zephyr OS build v4.1.0-2349-gf300714b77c9 ***
Running*** Booting Zephyr OS build v4.1.0-2349-gf300714b77c9 ***
Running TESTSUITE drivers_i2s_speed
===================================================================
START - test_i2s_transfer_long_44100

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/i2s/i2s_speed/src/test_i2s_speed.c:423: drivers_i2s_speed_test_i2s_transfer_long_44100: ret not equal to 0

 FAIL - test_i2s_transfer_long_44100 in 2.015 seconds
===================================================================
START - test_i2s_transfer_short_08000
Failed to configure I2S TX stream (-22)

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/i2s/i2s_speed/src/test_i2s_speed.c:196: i2s_transfer_short: ret not equal to TC_PASS

 FAIL - test_i2s_transfer_short_08000 in 0.017 seconds
===================================================================
START - test_i2s_transfer_short_16000

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Thanks @hakehuang , passing this test also requires #88554

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#88554 merged, and i2s_speed passes now in this PR.

@@ -20,6 +20,7 @@ tests:
- mimxrt685_evk/mimxrt685s/cm33
- lpcxpresso55s36
- frdm_mcxn947/mcxn947/cpu0
- mcx_n9xx_evk/mcxn947/cpu0
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it voltage seems slightly out of the check range.

*** Booting Zephyr OS build v4.1.0-2349-gf300714b77c9 ***
Running TESTSUITE regulator_voltage
===================================================================
START - test_output_voltage
Testing vref@111000, 12 voltage/s (tolerance: 10000 uV)
Set: 1000000, read: 982000 uV

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/regulator/voltage/src/main.c:97: regulator_voltage_test_output_voltage: val_mv * 1000 not between volt_uv - tols[i] and volt_uv + tols[i] inclusive

 FAIL - test_output_voltage in 0.027 seconds
===================================================================
TESTSUITE regulator_voltage failed.

------ TESTSUITE SUMMARY START ------

SUITE FAIL -   0.00% [regulator_voltage]: pass = 0, fail = 1, skip = 0, total = 1 duration = 0.027 seconds
 - FAIL - [regulator_voltage.test_output_voltage] duration = 0.027 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
RunID: a0172901be62d95b20cf5de5f3b72af4
PROJECT EXECUTION FAILED

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Yes, the same issue is seen on the FRDM-MCXN947 board. I submitted Issue #88826

* SPDX-License-Identifier: Apache-2.0
*/

/* Connect J2-10 and J2-8 */
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this connection does not work for me, as I see it is used as spi for debugger. do I need remove r168, r169?

*** Booting Zephyr OS build v4.1.0-2349-gf3007*** Booting Zephyr OS build v4.1.0-2349-gf300714b77c9 ***
SPI test on buffers TX/RX 0x300043a0/0x30004380, frame size = 8, DMA enabled (without CONFIG_NOCACHE_MEMORY)
Polling...Running TESTSUITE spi_extra_api_features
===================================================================
START - test_spi_lock_release
E: Timeout waiting for transfer complete

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/spi/spi_loopback/src/spi.c:109: spi_loopback_transceive: (ret is true)
SPI transceive failed, code -116
 FAIL - test_spi_lock_release in 0.218 seconds
===================================================================
TESTSUITE spi_extra_api_features failed.
Running TESTSUITE spi_extra_api_features
===================================================================
START - test_spi_lock_release
E: Timeout waiting for transfer complete

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/spi/spi_loopback/src/spi.c:109: spi_loopback_transceive: (ret is true)
SPI transceive failed, code -116
 FAIL - test_spi_lock_release in 0.218 seconds
===================================================================
TESTSUITE spi_extra_api_features failed.
Running TESTSUITE spi_loopback
===================================================================
Testing loopback spec: SLOW
START - test_nop_nil_bufs
 PASS - test_nop_nil_bufs in 0.001 seconds
===================================================================
START - test_spi_async_call

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/spi/spi_loopback/src/spi.c:359: spi_async_call_cb: (k_poll(evt, 1, K_MSEC(2000)) is true)
one or more events are not ready
 FAIL - test_spi_async_call in 2.017 seconds
===================================================================
START - test_spi_complete_large_transfers

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@DerekSnell DerekSnell Apr 20, 2025

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I found the issue, and it was related to the board init hook. The spi_loopback test passes now with this PR.

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more tests passing:

  • tests/drivers/spi/spi_loopback, also tests DMA
  • tests/drivers/i2c/i2c_target_api
  • tests/drivers/uart/uart_async_api/drivers.uart.async_api.lpuart

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Confirmed another test passes:

  • tests/drivers/counter/counter_basic_api/drivers.counter.basic_api

CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 1U);
#endif

#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(flexcomm1))
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This looks like its copied from mcxn947 evk, and fails to enable other flexcomm clocks if enabled in DT. This cost me quite a bit of time and was highly surprising behavior.

If I can make a bold recommendation of creating a common soc init function that any flexcomm clock if the DT node is enabled to avoid surprises?

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Thanks @teburd ,
I added all the Flexcomm clocks to this file. FYI, one reason we stopped putting clock init code at the SOC level is because clock configuration is very app specific. Custom boards will usually need to customize the clock config. We moving the clock init code to the board level is easier for users. Ideally these clocks will all be configured by devicetree. But until we have that framework ready, we can add the Flexcomm clocks here. Thanks

hakehuang
hakehuang previously approved these changes Apr 22, 2025
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board testing pass

Another board for the MCXN947 SOC, very similar to FRDM-MCXN947

Signed-off-by: Derek Snell <[email protected]>

Programming and Debugging
*************************

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Can definitely be a follow-up but would be nice to use the supported runners sphinx directive

@kartben kartben merged commit dd82520 into zephyrproject-rtos:main Apr 25, 2025
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6 participants