Skip to content

[HUST CSE][bsp]fix mismatched function types in rt_pin_ops for all drv_gpio.c #7185

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Apr 7, 2023
Merged

[HUST CSE][bsp]fix mismatched function types in rt_pin_ops for all drv_gpio.c #7185

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
955dff0
fix mismatched function types in rt_pin_ops for all drv_gpio.c
XLOverflow Apr 6, 2023
5ce3d9f
Update bsp/ESP32_C3/drivers/drv_gpio.c
XLOverflow Apr 7, 2023
f3ae410
Update bsp/ESP32_C3/drivers/drv_gpio.c
XLOverflow Apr 7, 2023
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
20 changes: 10 additions & 10 deletions bsp/ESP32_C3/drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -15,20 +15,20 @@

#ifdef RT_USING_PIN

static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void mcu_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
gpio_set_level(pin, value);
/*TODO:set gpio out put mode */
}

static int mcu_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t mcu_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
rt_int8_t value;
value = gpio_get_level(pin);
return value;
}

static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
gpio_config_t io_conf;
io_conf.intr_type = GPIO_INTR_DISABLE;
Expand All @@ -45,22 +45,22 @@ static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
}


static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t irq_mode, void (*hdr)(void *args), void *args)
static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t irq_mode, void (*hdr)(void *args), void *args)
{

/*TODO: start irq handle */
return RT_EOK;
return -RT_ENOSYS;
}

static rt_err_t mcu_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t mcu_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
{
/*TODO:disable gpio irq handle */
return RT_EOK;
}

static rt_err_t mcu_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
/*TODO:start irq handle */
return RT_EOK;
Expand All @@ -72,7 +72,7 @@ const static struct rt_pin_ops _mcu_pin_ops =
mcu_pin_write,
mcu_pin_read,
mcu_pin_attach_irq,
mcu_pin_dettach_irq,
mcu_pin_detach_irq,
mcu_pin_irq_enable,
RT_NULL,
};
Expand Down
14 changes: 7 additions & 7 deletions bsp/Vango/v85xx/drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ static rt_base_t v85xx_pin_get(const char *name)
return pin;
}

static void v85xx_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void v85xx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
Expand All @@ -140,7 +140,7 @@ static void v85xx_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
}
}

static int v85xx_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t v85xx_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
Expand All @@ -161,7 +161,7 @@ static int v85xx_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void v85xx_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void v85xx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
GPIO_InitType GPIO_InitStruct = {0};

Expand Down Expand Up @@ -219,8 +219,8 @@ rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
}


static rt_err_t v85xx_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t v85xx_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -258,7 +258,7 @@ static rt_err_t v85xx_pin_attach_irq(struct rt_device *device, rt_int32_t pin,

return RT_EOK;
}
static rt_err_t v85xx_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t v85xx_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -288,7 +288,7 @@ static rt_err_t v85xx_pin_detach_irq(struct rt_device *device, rt_int32_t pin)

return RT_EOK;
}
static rt_err_t v85xx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
static rt_err_t v85xx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
const struct pin_irq_map *irqmap;
rt_base_t level;
Expand Down
14 changes: 7 additions & 7 deletions bsp/Vango/v85xxp/drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -121,7 +121,7 @@ static rt_base_t V85XXP_pin_get(const char *name)
return pin;
}

static void V85XXP_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void V85XXP_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
GPIO_Type *gpio_port;
uint16_t gpio_pin;
Expand All @@ -141,7 +141,7 @@ static void V85XXP_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
}
}

static int V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_Type *gpio_port;
uint16_t gpio_pin;
Expand All @@ -162,7 +162,7 @@ static int V85XXP_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void V85XXP_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void V85XXP_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
GPIO_InitType GPIO_InitStruct = {0};

Expand Down Expand Up @@ -220,8 +220,8 @@ rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
}


static rt_err_t V85XXP_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t V85XXP_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -259,7 +259,7 @@ static rt_err_t V85XXP_pin_attach_irq(struct rt_device *device, rt_int32_t pin,

return RT_EOK;
}
static rt_err_t V85XXP_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t V85XXP_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -289,7 +289,7 @@ static rt_err_t V85XXP_pin_detach_irq(struct rt_device *device, rt_int32_t pin)

return RT_EOK;
}
static rt_err_t V85XXP_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
static rt_err_t V85XXP_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
const struct pin_irq_map *irqmap;
rt_base_t level;
Expand Down
14 changes: 7 additions & 7 deletions bsp/acm32/acm32f0x0-nucleo/drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -175,7 +175,7 @@ static const struct pin_index *get_pin(uint8_t pin)
return index;
};

static void acm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void acm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
const struct pin_index *index;

Expand All @@ -188,7 +188,7 @@ static void acm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
HAL_GPIO_WritePin(index->gpio, index->pin, (enum_PinState_t)value);
}

static int acm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t acm32_pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;
Expand All @@ -206,7 +206,7 @@ static int acm32_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void acm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void acm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
const struct pin_index *index;
GPIO_InitTypeDef GPIO_InitStruct;
Expand Down Expand Up @@ -308,8 +308,8 @@ static void acm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)

#define PIN2INDEX(pin) ((pin) % 16)

static rt_err_t acm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t acm32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
const struct pin_index *index;
rt_base_t level;
Expand Down Expand Up @@ -348,7 +348,7 @@ static rt_err_t acm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}

static rt_err_t acm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t acm32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
const struct pin_index *index;
rt_base_t level;
Expand Down Expand Up @@ -378,7 +378,7 @@ static rt_err_t acm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}

static rt_err_t acm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
const struct pin_index *index;
struct pin_irq_map *irqmap;
Expand Down
14 changes: 7 additions & 7 deletions bsp/acm32/acm32f4xx-nucleo/drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -193,7 +193,7 @@ static const struct pin_index *get_pin(uint8_t pin)
return index;
};

static void _pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void _pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
const struct pin_index *index;

Expand All @@ -206,7 +206,7 @@ static void _pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
HAL_GPIO_WritePin(index->gpio, index->pin, (enum_PinState_t)value);
}

static int _pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t _pin_read(rt_device_t dev, rt_base_t pin)
{
int value;
const struct pin_index *index;
Expand All @@ -224,7 +224,7 @@ static int _pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void _pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void _pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
const struct pin_index *index;
GPIO_InitTypeDef GPIO_InitStruct;
Expand Down Expand Up @@ -280,8 +280,8 @@ static void _pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)

#define PIN2INDEX(pin) ((pin) % 16)

static rt_err_t _pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t _pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
const struct pin_index *index;
rt_base_t level;
Expand Down Expand Up @@ -320,7 +320,7 @@ static rt_err_t _pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}

static rt_err_t _pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t _pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
const struct pin_index *index;
rt_base_t level;
Expand Down Expand Up @@ -350,7 +350,7 @@ static rt_err_t _pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}

static rt_err_t _pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
const struct pin_index *index;
struct pin_irq_map *irqmap;
Expand Down
14 changes: 7 additions & 7 deletions bsp/airm2m/air105/libraries/rt_drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,15 +52,15 @@ static rt_base_t air105_pin_get(const char *name)
return pin;
}

static void air105_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void air105_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
if (pin < GPIO_MAX)
{
GPIO_Output(pin, value);
}
}

static int air105_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t air105_pin_read(rt_device_t dev, rt_base_t pin)
{
if (pin < GPIO_MAX)
{
Expand All @@ -72,7 +72,7 @@ static int air105_pin_read(rt_device_t dev, rt_base_t pin)
}
}

static void air105_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void air105_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
if (pin >= GPIO_MAX)
{
Expand All @@ -99,8 +99,8 @@ static void air105_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
}
}

static rt_err_t air105_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t air105_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_base_t level;

Expand All @@ -123,7 +123,7 @@ static rt_err_t air105_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}

static rt_err_t air105_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t air105_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
rt_base_t level;
level = rt_hw_interrupt_disable();
Expand All @@ -136,7 +136,7 @@ static rt_err_t air105_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}

static rt_err_t air105_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{

rt_base_t level;
Expand Down
14 changes: 7 additions & 7 deletions bsp/airm2m/air32f103/libraries/rt_drivers/drv_gpio.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -140,7 +140,7 @@ static rt_base_t air32_pin_get(const char *name)
return pin;
}

static void air32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void air32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
Expand All @@ -154,7 +154,7 @@ static void air32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
}
}

static int air32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t air32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
Expand All @@ -170,7 +170,7 @@ static int air32_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}

static void air32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void air32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
GPIO_InitTypeDef GPIO_InitStruct;

Expand Down Expand Up @@ -236,8 +236,8 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
return &pin_irq_map[mapindex];
};

static rt_err_t air32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t air32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -276,7 +276,7 @@ static rt_err_t air32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}

static rt_err_t air32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t air32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
rt_base_t level;
rt_int32_t irqindex = -1;
Expand Down Expand Up @@ -308,7 +308,7 @@ static rt_err_t air32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}

static rt_err_t air32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
const struct pin_irq_map *irqmap;
rt_base_t level;
Expand Down
Loading