Rename various SIMD load instructions

[dcodeIO]

Renames the SIMD instructions

• LoadSplatVec8x16 -> Load8SplatVec128
• LoadSplatVec16x8 -> Load16SplatVec128
• LoadSplatVec32x4 -> Load32SplatVec128
• LoadSplatVec64x2 -> Load64SplatVec128
• Load32Zero -> Load32ZeroVec128
• Load64Zero -> Load64ZeroVec128

as per #3784 (comment).

[dcodeIO]

There are also

• LoadExtSVec8x8ToVecI16x8
• LoadExtUVec8x8ToVecI16x8
• LoadExtSVec16x4ToVecI32x4
• LoadExtUVec16x4ToVecI32x4
• LoadExtSVec32x2ToVecI64x2
• LoadExtUVec32x2ToVecI64x2

mapping to

• v128.load8x8_s(memarg) -> v128: load eight 8-bit integers and sign extend each one to a 16-bit lane
• v128.load8x8_u(memarg) -> v128: load eight 8-bit integers and zero extend each one to a 16-bit lane
• v128.load16x4_s(memarg) -> v128: load four 16-bit integers and sign extend each one to a 32-bit lane
• v128.load16x4_u(memarg) -> v128: load four 16-bit integers and zero extend each one to a 32-bit lane
• v128.load32x2_s(memarg) -> v128: load two 32-bit integers and sign extend each one to a 64-bit lane
• v128.load32x2_u(memarg) -> v128: load two 32-bit integers and zero extend each one to a 64-bit lane

but these seem a bit odd in that they use the v128 namespace, though it may be arguable that these may as well use the i16x8 etc. namespaces to denote their return value (which would then match their naming in Binaryen), so I didn't rename these yet. Do you know why these are specced to use v128?

[dcodeIO]

Found this issue for reference meanwhile: WebAssembly/simd#297. Makes sense when thinking about the common denominator being loads.

[dcodeIO]

Perhaps names could be:

• LoadExtSVec8x8ToVecI16x8 -> Load8x8SVec128
• LoadExtUVec8x8ToVecI16x8 -> Load8x8UVec128
• LoadExtSVec16x4ToVecI32x4 -> Load16x4SVec128
• LoadExtUVec16x4ToVecI32x4 -> Load16x4UVec128
• LoadExtSVec32x2ToVecI64x2 -> Load32x2SVec128
• LoadExtUVec32x2ToVecI64x2 -> Load32x2UVec128

[tlively]

That looks good to me!