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[SYCL][PI] Add interoperability with generic handles to device and program classes #1244
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Could you add stubs for the new PI functions to the CUDA backend ? Or, does the plugin system detect if a function is not implemented in a plugin and already warns accordingly ? |
assert(program); | ||
assert(handle); | ||
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if (*program == nullptr) { |
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What dies it mean?
*program
type is pi_program
.
Probably it's better to re-write:
if (*handle == nullptr) {
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it means that *program is not initialized.
Even if I chnage it to if(*handle==nullptr), based ont he current code, I will have to add assert(*program==nullptr); So the check would still be there.
It does not give a warning. I will add the method and use the "not implemented" message you are in pi_cuda.cpp file. |
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@smaslov-intel @romanovvlad Let me know if you see anything missing. |
@garimagu, could you update the branch, please? |
Signed-off-by: Garima Gupta <[email protected]>
Signed-off-by: Garima Gupta <[email protected]>
Signed-off-by: Garima Gupta <[email protected]>
Signed-off-by: Garima Gupta <[email protected]>
Signed-off-by: Garima Gupta <[email protected]>
Signed-off-by: Garima Gupta <[email protected]>
Device instead of MDevice. Signed-off-by: Garima Gupta <[email protected]>
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…gramConvert. Returning error code from clRetainDevice/clRetainProgram. Signed-off-by: Garima Gupta <[email protected]>
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Why specific interop functions per PI type and not just a generic piGetInteropHandle
function that can retrieve any? Seems it is easier to maintain if its on a single place. For the OpenCL backend is probably just a cast, and for other backends there may be other ways of converting the type (e.g. for the CUDA backend its likely calling the .get()
method on the handle).
Let's address this concern separately. |
@bader Please merge if you think the changes look ok. |
We can continue the discussion on the review: #1332 |
* sycl: (1209 commits) [SYCL] Check exit status get_device_count_by_type [SYCL][Doc] Update sub-group extension docs (intel#1330) [SYCL][Doc] Add leader to GroupAlgorithms (intel#1297) [SYCL] Add SYCL headers search path to default compilation options (intel#1347) [SYCL][PI] Add interoperability with generic handles to device and program classes (intel#1244) Move SPIR devicelib to top level (intel#1276) [SYCL][Driver] Improve fat static library support (intel#1319) [SYCL] Remove image_api LIT (intel#1349) [SYCL] Fix headers location for check-sycl-deploy target [SYCL] Allow gcc asm statements in kernel code (intel#1341) [SYCL] Add Intel FPGA force_pow2_depth attribute (intel#1284) [SPIR-V][NFC] Fix for building llvm-spirv with -DLLVM_LINK_LLVM_DYLIB=ON (intel#1323) [SYCL][NFC] Fix execution graph dump (intel#1331) [SYCL][Doc] Release SYCL_INTEL_enqueue_barrier extension document (intel#1199) [SYCL][USM] Fix USM malloc_shared and free to handle zero byte (intel#1273) [SYCL] Fix undefined symbols in async_work_group_copy (intel#1243) [SYCL] Mark calls to barrier and work-item functions as convergent [SYCL][CUDA] Fix CUDA plug-in build with enabled assertions (intel#1325) [SYCL][Test] Add OpenCL requirement to test/ordered_queue/prop.cpp (intel#1335) [SYCL][CUDA] Improve CUDA backend documentation (intel#1293) ...
… bits (intel#1244) This if fix for intel#1213 This patch adds Store instructions in cases when return value is wider than 64 bits Original commit: KhronosGroup/SPIRV-LLVM-Translator@7904ea9
This is an effort to handle interoperability with any SYCL BE.
Currently, the support if only handled for Device and Program class.