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[SYCL][PI] Add interoperability with generic handles to device and program classes #1244

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Merged
merged 8 commits into from
Mar 19, 2020

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garimagu
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@garimagu garimagu commented Mar 4, 2020

This is an effort to handle interoperability with any SYCL BE.
Currently, the support if only handled for Device and Program class.

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fwyzard commented Mar 4, 2020

Could you add stubs for the new PI functions to the CUDA backend ?

Or, does the plugin system detect if a function is not implemented in a plugin and already warns accordingly ?

@bader bader changed the title Adding support to use BE raw handles (for device and program) [SYCL][PI] Add interoperability with generic handles to device and program classes Mar 4, 2020
assert(program);
assert(handle);

if (*program == nullptr) {
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What dies it mean?
*program type is pi_program.
Probably it's better to re-write:

if (*handle == nullptr) {

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it means that *program is not initialized.
Even if I chnage it to if(*handle==nullptr), based ont he current code, I will have to add assert(*program==nullptr); So the check would still be there.

@garimagu
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garimagu commented Mar 4, 2020

Could you add stubs for the new PI functions to the CUDA backend ?

Or, does the plugin system detect if a function is not implemented in a plugin and already warns accordingly ?

It does not give a warning. I will add the method and use the "not implemented" message you are in pi_cuda.cpp file.
thanks for pointing it out.

@garimagu garimagu force-pushed the rawhandle_interop branch from d12681e to 58a113e Compare March 5, 2020 18:15
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@smaslov-intel @romanovvlad Let me know if you see anything missing.

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bader commented Mar 15, 2020

@garimagu, could you update the branch, please?

romanovvlad
romanovvlad previously approved these changes Mar 17, 2020
…gramConvert.

Returning error code from clRetainDevice/clRetainProgram.

Signed-off-by: Garima Gupta <[email protected]>
@garimagu garimagu force-pushed the rawhandle_interop branch from baff0b9 to bb7793b Compare March 17, 2020 21:12
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Why specific interop functions per PI type and not just a generic piGetInteropHandle function that can retrieve any? Seems it is easier to maintain if its on a single place. For the OpenCL backend is probably just a cast, and for other backends there may be other ways of converting the type (e.g. for the CUDA backend its likely calling the .get() method on the handle).

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Why specific interop functions per PI type and not just a generic piGetInteropHandle function that can retrieve any? Seems it is easier to maintain if its on a single place. For the OpenCL backend is probably just a cast, and for other backends there may be other ways of converting the type (e.g. for the CUDA backend its likely calling the .get() method on the handle).

Let's address this concern separately.

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@bader Please merge if you think the changes look ok.

@garimagu
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Why specific interop functions per PI type and not just a generic piGetInteropHandle function that can retrieve any? Seems it is easier to maintain if its on a single place. For the OpenCL backend is probably just a cast, and for other backends there may be other ways of converting the type (e.g. for the CUDA backend its likely calling the .get() method on the handle).

Let's address this concern separately.

We can continue the discussion on the review: #1332

@bader bader merged commit 58dbd29 into intel:sycl Mar 19, 2020
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Mar 20, 2020
* sycl: (1209 commits)
  [SYCL] Check exit status get_device_count_by_type
  [SYCL][Doc] Update sub-group extension docs (intel#1330)
  [SYCL][Doc] Add leader to GroupAlgorithms (intel#1297)
  [SYCL] Add SYCL headers search path to default compilation options (intel#1347)
  [SYCL][PI] Add interoperability with generic handles to device and program classes (intel#1244)
  Move SPIR devicelib to top level (intel#1276)
  [SYCL][Driver] Improve fat static library support (intel#1319)
  [SYCL] Remove image_api LIT (intel#1349)
  [SYCL] Fix headers location for check-sycl-deploy target
  [SYCL] Allow gcc asm statements in kernel code (intel#1341)
  [SYCL] Add Intel FPGA force_pow2_depth attribute (intel#1284)
  [SPIR-V][NFC] Fix for building llvm-spirv with -DLLVM_LINK_LLVM_DYLIB=ON (intel#1323)
  [SYCL][NFC] Fix execution graph dump (intel#1331)
  [SYCL][Doc] Release SYCL_INTEL_enqueue_barrier extension document (intel#1199)
  [SYCL][USM] Fix USM malloc_shared and free to handle zero byte (intel#1273)
  [SYCL] Fix undefined symbols in async_work_group_copy (intel#1243)
  [SYCL] Mark calls to barrier and work-item functions as convergent
  [SYCL][CUDA] Fix CUDA plug-in build with enabled assertions (intel#1325)
  [SYCL][Test] Add OpenCL requirement to test/ordered_queue/prop.cpp (intel#1335)
  [SYCL][CUDA] Improve CUDA backend documentation (intel#1293)
  ...
vmaksimo pushed a commit to vmaksimo/llvm that referenced this pull request Oct 18, 2021
… bits (intel#1244)

This if fix for intel#1213
This patch adds Store instructions in cases when return value is wider than 64 bits

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@7904ea9
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6 participants