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[SYCL] Add template parameter support for no_global_work_offset attribute #2839

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Merged
merged 13 commits into from
Dec 17, 2020

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smanna12
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@smanna12 smanna12 commented Dec 1, 2020

This patch

adds support for template parameter on
[[intel:: no_global_work_offset())]] attribute where
valid values are 0 and 1. If 1, compiler doesn't
use the global work offset values for the device function.
If used without argument, value of 1 is set implicitly.
Attribute parameter is optional,
so [[intelfpga::no_global_work_offset]] means
the same as [[intelfpga::no_global_work_offset(1)]].

updates sema/codegen tests with mock headers on device.

uses existing function "sema::addIntelSYCLSingleArgFunctionAttr" from
other single argument function attributes such as num_simd_work_items,
max_global_work_dim, and intel_reqd_sub_group_size to avoid source
codes duplication and reuse the codes for the template parameter support.

Removes Bool argument "Enabled" from test and attr.td file since template
parameter covers functionality of "Enabled" parameter.

Signed-off-by: Soumi Manna [email protected]

…bute

This patch

adds support for template parameter on
[[intel:: no_global_work_offset())]] attribute where
valid values are 0 and 1 and attribute parameter is optional,
so [[intelfpga::no_global_work_offset]] means the same as
[[intelfpga::no_global_work_offset(1)]].

updates sema/codegen tests with mock headers on device.

uses existing function "sema::addIntelSYCLSingleArgFunctionAttr" from
other single argument function attributes such as num_simd_work_items,
max_global_work_dim, and intel_reqd_sub_group_size to avoid source
codes duplication and reuse for the template parameter support.

Signed-off-by: Soumi Manna <[email protected]>
Signed-off-by: Soumi Manna <[email protected]>
Signed-off-by: Soumi Manna <[email protected]>
@smanna12 smanna12 marked this pull request as ready for review December 10, 2020 07:20
@smanna12 smanna12 changed the title [SYCL] Add template parameter support for no_global_work_offset attri… [SYCL] [FPGA] Add template parameter support for no_global_work_offset attri… Dec 10, 2020
@smanna12 smanna12 changed the title [SYCL] [FPGA] Add template parameter support for no_global_work_offset attri… [SYCL] Add template parameter support for no_global_work_offset attribute Dec 10, 2020
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@mlychkov mlychkov left a comment

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LGTM. Thank you.

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@AaronBallman AaronBallman left a comment

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Some drive-by comments as the review happened to catch my attention.

Signed-off-by: Soumi Manna <[email protected]>
Signed-off-by: Soumi Manna <[email protected]>
Signed-off-by: Soumi Manna <[email protected]>
Signed-off-by: Soumi Manna <[email protected]>
AaronBallman
AaronBallman previously approved these changes Dec 16, 2020
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Thanks for the discussion, the changes LGTM!

@smanna12
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Thanks for the discussion, the changes LGTM!

Thanks @AaronBallman for the reviews and feedback.

@smanna12
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Can I get a code-reviews from @Fznamznon / @premanandrao / @elizabethandrews as code-owners? Thanks.

@smanna12
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Thank you everyone for the review.

@romanovvlad romanovvlad merged commit a5fde5a into intel:sycl Dec 17, 2020
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Dec 21, 2020
* upstream/sycl: (616 commits)
  [SYCL][L0] Implement robust error handling in level_zero plugin (intel#2870)
  [SYCL][NFC] Code clean up (phase 5) revealed by self build. (intel#2907)
  [Driver][NFC] Remove unused variable (intel#2908)
  [Github Action] Enable automatic sync for main branch from llvm-project to llvm (intel#2904)
  [ESIMD][NFC] Remove unnecessary macro checks (intel#2900)
  [SYCL] Fix handling of multiple usages of composite spec constants (intel#2894)
  [SYCL] Adjust parallel-for range global size to improve group size selection (intel#2703)
  [SYCL] Add template parameter support for no_global_work_offset attribute (intel#2839)
  [SYCL] Support LLVM FP intrinsic in llvm-spirv and FE (intel#2880)
  [SYCL]Link Libm FP64 SYCL device library by default (intel#2892)
  [SYCL][NFC] Code clean up (phase 4) revealed by self build. (intel#2878)
  [SYCL][NFC] Code clean up (phase 3) revealed by self build. (intel#2865)
  [SYCL] Fix backend selection for SYCL_DEVICE_TYPE=* (intel#2890)
  [SYCL] Fix spec constants support in integration header (intel#2896)
  [Driver] Update unbundling of offload libraries to use archive type (intel#2883)
  [SYCL][NFC] Clang format SYCL.cpp (intel#2891)
  [CODEOWNERS] Add code owners for DPC++ tools (intel#2884)
  [XPTIFW] Enable in-tree builds (intel#2849)
  [SYCL] Don't dump IR and dot files by default in the LowerWGScope pass (intel#2887)
  [SYCL] Use llvm-link's only-needed option to link device libs (intel#2783)
  ...
@smanna12 smanna12 deleted the AddTempSupportNoglobalworkoffset branch September 5, 2023 19:31
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7 participants