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[CIR][CIRGen] support builtin signbit #1033

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Merged
merged 1 commit into from
Nov 11, 2024

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PikachuHyA
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This patch adds support for the __builtin_signbit intrinsic. The intrinsic requires special handling for PowerPC; however, since ClangIR does not currently support PowerPC, this handling is omitted in this implementation.

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handle PPC fp128

if (Ty->isPPC_FP128Ty()) {
// We want the sign bit of the higher-order double. The bitcast we just
// did works as if the double-double was stored to memory and then
// read as an i128. The "store" will put the higher-order double in the
// lower address in both little- and big-Endian modes, but the "load"
// will treat those bits as a different part of the i128: the low bits in
// little-Endian, the high bits in big-Endian. Therefore, on big-Endian
// we need to shift the high bits down to the low before truncating.
Width >>= 1;
if (CGF.getTarget().isBigEndian()) {
Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width);
V = CGF.Builder.CreateLShr(V, ShiftCst);
}
// We are truncating value in order to extract the higher-order
// double, which we will be using to extract the sign from.
IntTy = llvm::IntegerType::get(C, Width);
V = CGF.Builder.CreateTrunc(V, IntTy);
}

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@Lancern Lancern left a comment

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LGTM in general, some minor nits inline

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@bcardosolopes bcardosolopes left a comment

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Looks mostly good, we still need to track missing PPC support, see comments inline. Thanks for working on this

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Thanks for the updates, few more comments

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My suggestion is for you to first tackle the non-fp80 case, and add unrecheable for that case, in a follow up PR you tackle all the fp80 related shenenigans in one go. How about that?

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My suggestion is for you to first tackle the non-fp80 case, and add unrecheable for that case, in a follow up PR you tackle all the fp80 related shenenigans in one go. How about that?

Thanks for your suggestion! I agree that it makes sense to tackle the non-fp80 case first.

mlir::dyn_cast<cir::LongDoubleType>(op.getInput().getType())) {
if (mlir::isa<cir::FP80Type>(longDoubleType.getUnderlying())) {
// see https://github.com/llvm/clangir/issues/1057
llvm_unreachable("NYI");
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For next rounds: during LLVM lowering we're better off erroring out return op.emitError(...) - I'm gonna merge this anyway now cause I know you're gonna be working on this soon anyways! Thanks for the fixes.

@bcardosolopes bcardosolopes merged commit 15f3e5e into llvm:main Nov 11, 2024
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bcardosolopes pushed a commit that referenced this pull request Nov 13, 2024
follow #1033
handle `LongDoubleType` with `FP80Type`.
@PikachuHyA PikachuHyA deleted the support_signbit branch November 18, 2024 01:50
lanza pushed a commit that referenced this pull request Mar 18, 2025
This patch adds support for the `__builtin_signbit` intrinsic. The
intrinsic requires special handling for PowerPC; however, since ClangIR
does not currently support PowerPC, this handling is omitted in this
implementation.
lanza pushed a commit that referenced this pull request Mar 18, 2025
follow #1033
handle `LongDoubleType` with `FP80Type`.
xlauko pushed a commit to trailofbits/instafix-llvm that referenced this pull request Mar 28, 2025
follow llvm/clangir#1033
handle `LongDoubleType` with `FP80Type`.
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3 participants