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[TableGen][SubtargetEmitter] Early exit from loop in FindWriteResources and FindReadAdvance #92202

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Merged
merged 8 commits into from
May 16, 2024
Merged

[TableGen][SubtargetEmitter] Early exit from loop in FindWriteResources and FindReadAdvance #92202

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9235b8d
[TableGen][SubtargetEmitter] Early exit from loop in FindWriteResources
michaelmaitland May 15, 2024
6b710d0
fixup! make sure we PrintFatalError
michaelmaitland May 15, 2024
5212ee1
fixup! fix typo
michaelmaitland May 15, 2024
a802de7
fixup! no else after break
michaelmaitland May 15, 2024
56d79aa
fixup! swap conditions
michaelmaitland May 15, 2024
d70b201
fixup! SchedWrite -> SchedRead typo
michaelmaitland May 15, 2024
775f644
fixup! cache local variable
michaelmaitland May 15, 2024
2b6aa35
fixup! Assign ResDef if ALiasDef is non-null
michaelmaitland May 15, 2024
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18 changes: 14 additions & 4 deletions llvm/utils/TableGen/SubtargetEmitter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -902,14 +902,19 @@ SubtargetEmitter::FindWriteResources(const CodeGenSchedRW &SchedWrite,
for (Record *WR : ProcModel.WriteResDefs) {
if (!WR->isSubClassOf("WriteRes"))
continue;
if (AliasDef == WR->getValueAsDef("WriteType") ||
SchedWrite.TheDef == WR->getValueAsDef("WriteType")) {
Record *WRDef = WR->getValueAsDef("WriteType");
if (AliasDef == WRDef || SchedWrite.TheDef == WRDef) {
if (ResDef) {
PrintFatalError(WR->getLoc(), "Resources are defined for both "
"SchedWrite and its alias on processor " +
ProcModel.ModelName);
}
ResDef = WR;
// If there is no AliasDef and we find a match, we can early exit since
// there is no need to verify whether there are resources defined for both
// SchedWrite and its alias.
if (!AliasDef)
break;
}
}
// TODO: If ProcModel has a base model (previous generation processor),
Expand Down Expand Up @@ -956,14 +961,19 @@ Record *SubtargetEmitter::FindReadAdvance(const CodeGenSchedRW &SchedRead,
for (Record *RA : ProcModel.ReadAdvanceDefs) {
if (!RA->isSubClassOf("ReadAdvance"))
continue;
if (AliasDef == RA->getValueAsDef("ReadType") ||
SchedRead.TheDef == RA->getValueAsDef("ReadType")) {
Record *RADef = RA->getValueAsDef("ReadType");
if (AliasDef == RADef || SchedRead.TheDef == RADef) {
if (ResDef) {
PrintFatalError(RA->getLoc(), "Resources are defined for both "
"SchedRead and its alias on processor " +
ProcModel.ModelName);
}
ResDef = RA;
// If there is no AliasDef and we find a match, we can early exit since
// there is no need to verify whether there are resources defined for both
// SchedRead and its alias.
if (!AliasDef)
break;
}
}
// TODO: If ProcModel has a base model (previous generation processor),
Expand Down
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