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detect Meteor Lake CPU model #247

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detect Meteor Lake CPU model #247

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e597f51
Add support for detecting Intel P-Cores
Jul 2, 2024
a3d5dc1
Removed 'cove' from the end of Gracemont and Crestmont.
Jul 4, 2024
33725ab
Added new model ids for Rocket/Alder/Meteor Lake
Jul 24, 2024
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13 changes: 13 additions & 0 deletions include/cpuinfo.h
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Original file line number Diff line number Diff line change
Expand Up @@ -353,6 +353,19 @@ enum cpuinfo_uarch {
cpuinfo_uarch_palm_cove = 0x0010020B,
/** Intel Sunny Cove microarchitecture (10 nm, Ice Lake). */
cpuinfo_uarch_sunny_cove = 0x0010020C,
/** Intel Cypress Cove microarchitecture (14 nm, Rocket Lake) */
cpuinfo_uarch_cypress_cove = 0x0010020E,
/** Intel Golden Cove microarchitecture (Intel 7, Alder Lake P-Cores) */
cpuinfo_uarch_golden_cove = 0x0010020F,
/** Intel Gracemont microarchitecture (Intel 7, Alder/Raptor Lake E-Cores) */
cpuinfo_uarch_gracemont = 0x00100210,
/** Intel Raptor Cove microarchitecture (Intel 7, Raptor Lake P-Cores) */
cpuinfo_uarch_raptor_cove = 0x00100211,
/** Intel Redwood Cove microarchitecture (Intel 4, Meteor Lake P-Cores) */
cpuinfo_uarch_redwood_cove = 0x00100212,
/** Intel Crestmont microarchitecture (Intel 4, Meteor Lake E-Cores/LP-E-Cores) */
cpuinfo_uarch_crestmont = 0x00100213,


/** Pentium 4 with Willamette, Northwood, or Foster cores. */
cpuinfo_uarch_willamette = 0x00100300,
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26 changes: 26 additions & 0 deletions src/x86/uarch.c
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Expand Up @@ -2,6 +2,12 @@

#include <cpuinfo.h>
#include <x86/api.h>
#include <x86/cpuid.h>

CPUINFO_INTERNAL bool cpuinfo_x86_detect_pcores(){
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Will this work on pcore-only CPUs? I'm thinking the reverse logic should be used?
cpuinfo_x86_detect_hybrid_ecore(){
If the hybrid is not present, pcore should be assumed.

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Thank you, we have modified it to check whether it is a hybrid architecture.

CPUINFO_INTERNAL bool cpuinfo_x86_detect_hybrid_ecore(){
	if (((cpuid(0x1A).eax >> 24) & 0xFFF) == 0x20) return true;
	return false;
}

if (((cpuid(0x1A).eax >> 24) & 0xFFF) == 0x40) return true;
return false;
}

enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
enum cpuinfo_vendor vendor,
Expand Down Expand Up @@ -167,6 +173,26 @@ enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
case 0x7D: // Ice Lake-Y
case 0x7E: // Ice Lake-U
return cpuinfo_uarch_sunny_cove;
case 0xA7: // Rocket Lake
return cpuinfo_uarch_cypress_cove;
case 0x9A: // Alder Lake
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Alder Lake pcore can also have a model 0x97:
See Also this excerpt from https://stackoverflow.com/questions/69955410/how-to-detect-p-e-core-in-intel-alder-lake-cpu

The CPUID instruction gives information about the core, on which it is executed. It is different for P cores and E cores.

The CPUID on Alder Lake is family 6 model 0x9A for both cores when enabled. The CPUID is changed to family 6 model 0x97 when E cores are disabled and AVX512 is enabled.

CPUID leaf 7 EDX bit 15 indicates a hybrid design.

CPUID leaf 1A EAX bit 24-31 indicates the type of core, according to "Game Dev Guide for Alder Lake Performance Hybrid Architecture", https://www.intel.com/content/www/us/en/developer/articles/guide/alder-lake-developer-guide.html

See my discussion at https://www.agner.org/forum/viewtopic.php?f=1&t=79

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New model IDs have been added for Rocket, Alder, and Meteor Lake.

if (cpuinfo_x86_detect_pcores()){
return cpuinfo_uarch_golden_cove;
} else { // E Core
return cpuinfo_uarch_gracemont;
}
case 0xB7: // Raptor Lake
if (cpuinfo_x86_detect_pcores()){
return cpuinfo_uarch_raptor_cove;
} else { // E Core
return cpuinfo_uarch_gracemont;
}
case 0xAA: // Meteor Lake
if (cpuinfo_x86_detect_pcores()){
return cpuinfo_uarch_redwood_cove;
} else { // E/LP-E Core
return cpuinfo_uarch_crestmont;
}

/* Low-power cores */
case 0x1C: // Diamondville,
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13 changes: 13 additions & 0 deletions tools/cpu-info.c
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Expand Up @@ -80,6 +80,19 @@ static const char* uarch_to_string(enum cpuinfo_uarch uarch) {
return "Palm Cove";
case cpuinfo_uarch_sunny_cove:
return "Sunny Cove";
case cpuinfo_uarch_cypress_cove:
return "Cypress Cove";
case cpuinfo_uarch_golden_cove:
return "Golden Cove";
case cpuinfo_uarch_gracemont:
return "Gracemont";
case cpuinfo_uarch_raptor_cove:
return "Raptor Cove";
case cpuinfo_uarch_redwood_cove:
return "Redwood Cove";
case cpuinfo_uarch_crestmont:
return "Crestmont";

case cpuinfo_uarch_willamette:
return "Willamette";
case cpuinfo_uarch_prescott:
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