Update next branch with latest changes from master
#447
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* Add registers::debug * impl DebugAddressRegister in macro * Declare debug register acesses as nomem * Use u64 for DebugAddressRegisters * Dr7: Remove get_ prefix from getters * debug.rs: Remove redundant denying of unsafe_op_in_unsafe_fn * debug.rs: Remove TryFrom impls They don't add value over the inherent constructor functions. * Don't set repr on DebugAddressRegisterNumber * Make DebugAddressRegisterNumber an enum * debug.rs: Remove redundant asm import * Add DebugAddressRegister::NUM * Strip Hw Prefix from HwBreakpointCondition and HwBreakpointSize
add getters for the page table frame mapping
Release v0.14.10
Currently the InterruptDescriptorTable is missing entry with vector number 28, #HV. More information at AMD's APM Volume 2, subsection 8.2.21. See issue #377. Signed-off-by: Carlos Bilbao <[email protected]>
Currently the InterruptDescriptorTable is missing entry with vector number 21, #CP. More information at AMD's APM Volume 2, subsection 8.2.20. See issue #378. Signed-off-by: Carlos Bilbao <[email protected]>
Include the cases for #CP (cp_protection_exception) and #HV (hv_injection_exception) in the Index and IndexMut implementations. Signed-off-by: Carlos Bilbao <[email protected]>
Add the following changes to macro set_general_handler_entry! to account for the newly added vector entries: For #HV (vector 28) we need to remove the empty arm. For #CP (vector 21) we need to remove the empty arm, and include a new arm. Signed-off-by: Carlos Bilbao <[email protected]>
Update tests for IDTs considering newly added vector entries #CP and #HV. Signed-off-by: Carlos Bilbao <[email protected]>
Fix typo in #CP definition. Signed-off-by: Carlos Bilbao <[email protected]>
The #CP (vector 21) exception can also be generated due to a missing ENDBRANCH instruction if indirect branch tracking is enabled. Include this in the comments. Signed-off-by: Carlos Bilbao <[email protected]>
Make case #CP (21) reachable for Index and IndexMut implementations. Signed-off-by: Carlos Bilbao <[email protected]>
Add missing IDT entries #CP and #HV
Adding next_higher_level to PageLevelIndex
Adding `is_empty` to PageTable
Check for breaking changes on CI
Now that the representation is fixed, these types can be embedded into other structures such as AMD's `VMCB` and `VMSA` or Intel's `ATTRIBUTES` (SGX).
This newer version has stronger guarantees about the type layout of the generated types: It guarantees that types annotated with `repr(transparent)` are newtypes around the base integer.
set repr to transparent for various types
Release v0.14.11
Signed-off-by: Joe Richey <[email protected]>
Add HandlerFuncType trait
* Create dependabot.yml * Only update major versions for Github Actions Signed-off-by: Joyce <[email protected]> Signed-off-by: Joe Richey <[email protected]> Co-authored-by: Joe Richey <[email protected]>
Bumps [actions/checkout](https://github.com/actions/checkout) from 3 to 4. - [Release notes](https://github.com/actions/checkout/releases) - [Changelog](https://github.com/actions/checkout/blob/main/CHANGELOG.md) - [Commits](actions/checkout@v3...v4) --- updated-dependencies: - dependency-name: actions/checkout dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <[email protected]> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
…ng assembly (#440) * fix(interrupts): replace compiler fences with potentially-synchronizing assembly Compiler fences only synchronize with atomic instructions. When creating a thread-local critical section, we need to prevent reordering of any reads and writes across interrupt toggles, not just atomic ones. To achieve this, we omit `nomem` from `asm!`. Since then, the assembly might potentially perform synchronizing operations such as acquiring or releasing a lock, the compiler won't move any reads and writes through these assembly blocks. Signed-off-by: Martin Kröning <[email protected]> * fix(interrupts): add `preserves_flags` option `IF` from `EFLAGS` must not be restored upon exiting the asm block. https://doc.rust-lang.org/stable/reference/inline-assembly.html#rules-for-inline-assembly Signed-off-by: Martin Kröning <[email protected]> --------- Signed-off-by: Martin Kröning <[email protected]>
add from_slice to VirtAddr
CI: Run `semver-checks` using stable Rust
We already expose `Cr3::read_raw`, so we might as well expose the write variant.
expose `Cr3::write_raw`
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Closing, no longer needed. |
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How can I review this? Is there a way to see conflict resolution changes of the merge or rebase from master into next or we're all of those already handled in #446? |
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Ah, ok that makes sense, thanks! I just fast-forwarded a few more commits from #446 including the version bump commit, so CI (and the semver check in particular) passes. |
Freax13
approved these changes
Jan 14, 2024
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Update
nextbranch with latest changes frommaster, using the conflict resolution from #446.This PR allows us to apply more changes to the
nextbranch before releasev0.15. In particular, we plan to merge a change to make the GDT const generic before the release.