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CI:adc_dma:frdm_k64f: adc_read return EBUSY in repeat_sample test #58467
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@dleach02 , @yvanderv
and this only happens on frdm_k64f |
@hakehuang I do not believe we should be setting A sample interval of 2us will result in a necessary conversion rate of 500ksps, which is not possible in 16 bit mode. Futhermore, with the default SYSTICK timer source and Prior to PR #56104, the sampling interval for the K64 would have been 10000us. This is easily achievable with the ADC. On my board, the ADC can sample within a 12us period: I believe the intermittent nature of the failure is because the kernel timer will not usually fire within a 2us boundary, but in some cases it can fire close to that boundary, which allows the ADC context subsystem to detect that the ADC is failing to sample within an 2us period. You can see a case here where the kernel timer fires multiple times in quick succession (each toggle of the KERN_TIMER signal is the timer expiry, and BUSY_ERR indicates the context subsystem set the -EBUSY status): Edit: after investigating this a bit further, I see no reason not to set the sampling interval to 0us. This will result in the ADC subsystem sampling as fast as possible without using a kernel timer. This avoids the pitfalls of using a short kernel timer, which may expire while the user's ADC callback is still running, and does not result in the next ADC sample starting until the prior one has completed. |
@danieldegrasse , the concern here is that, for a real user case, they always expect to have fix sampled value so that the following FFT algorithm can works well, and I set it to 2US is because 500K sample rates is a typical one when we do auido noise reducing, the adc will record the micophone output and use the recorded data compare with the earphone inputs, such as user own voice will be removed from earphone. so l suggest to keep the interval, and maybe we can change to a small one. |
@hakehuang I understand for an use case like an FFT where the user might want to sample at a fixed interval the 2US timeout would make sense, but achieving this timeout with the current driver and test has a few issues: In the below diagrams, each signal has the following meaning:
Here we see that the kernel timer is expiring within 28us, which is still not the requested 2us (it does not seem this interval is not possible given the rate the system timer runs at). We do see that the kernel timer expires while a DMA sample is executing, and this run of the test failed as expected. If we increase the kernel timer interval to 30us (and reconfigure If we want to take full advantage of the ADC here, I think we need to implement the |
@danieldegrasse fully agree with your judgement, for now I would suggest we can just enlarge the HW_TRIGGER_INTERVAL to a reasonable value, and create a PR to improve, what do you think? |
Thanks for the clarification here about when the ADC will actually sample- I was under the impression a sample would not occur until the DMA engine was started. I will update the linked PR to increase |
Increase hardware sampling interval to 30ms for MCUX ADC16. The ADC callback in the repeated_samplings test takes roughly 27ms to execute, so a sampling frequency of this interval still allows the ADC test to verify the ADC is being sampled at a given interval, while avoiding the pitfalls that result from a kernel timer shorter than the duration the ADC callback takes to run. Fixes #58467 Signed-off-by: Daniel DeGrasse <[email protected]>
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Describe the bug
frdm_k64f: adc_read return EBUSY in repeat_sample test
Please also mention any information which could help others to understand
the problem you're facing:
FRDM_K64F
change the HW_TRIGGER_INTERVAL to 4.
do not use PICO lib
specific commit?
there is low rate to such issue before 3.4.0, but it is high in 3.4.0, git bisect can not find a related code change
To Reproduce
Steps to reproduce the behavior:
Expected behavior
test PASS
Impact
adc repeat sampling
Logs and console output
Environment (please complete the following information):
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