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Merged
merged 2 commits into from
Jun 17, 2020
Merged

Eth Click #26213

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bf7fcab
boards: lpcxpresso55s69 use GPIO as SPI CS
agansari Jun 16, 2020
f52316a
drivers: eth: enc28j60: Misc fixes
agansari Jun 16, 2020
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6 changes: 5 additions & 1 deletion boards/arm/lpcxpresso55s69/pinmux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -125,8 +125,12 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev)
IOCON_PIO_SLEW_STANDARD |
IOCON_PIO_OPENDRAIN_DI);

uint32_t pio_func = IOCON_PIO_FUNC5; /* Flexcomm controlled CS*/
#if DT_NODE_HAS_PROP(DT_NODELABEL(hs_lspi), cs_gpios)
pio_func = IOCON_PIO_FUNC0; /* GPIO controlled CS*/
#endif
/* PORT1 PIN1 is configured as HS_SPI_SSEL1 */
pinmux_pin_set(port1, 1, IOCON_PIO_FUNC5 |
pinmux_pin_set(port1, 1, pio_func |
IOCON_PIO_MODE_PULLUP |
IOCON_PIO_INV_DI |
IOCON_PIO_DIGITAL_EN |
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17 changes: 9 additions & 8 deletions drivers/ethernet/eth_enc28j60.c
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Expand Up @@ -382,18 +382,18 @@ static void eth_enc28j60_init_mac(struct device *dev)
}

/* Configure MAC address */
eth_enc28j60_set_bank(dev, ENC28J60_REG_MAADR0);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR0,
eth_enc28j60_set_bank(dev, ENC28J60_REG_MAADR1);
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The enc28j60 was working mostly ok last time I tried without these changes. What are the symptoms if these changes are not done, could you describe these also in commit msg.

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It's a mismatch with the latest reference manual, there is no MAADR0 register.

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Ok. I just have not seen issues regarding Ethernet functionality, so wondering how this mismatch shows itself.

eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR6,
context->mac_address[5]);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR1,
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR5,
context->mac_address[4]);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR2,
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR4,
context->mac_address[3]);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR3,
context->mac_address[2]);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR4,
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR2,
context->mac_address[1]);
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR5,
eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR1,
context->mac_address[0]);
}

Expand Down Expand Up @@ -510,6 +510,7 @@ static int eth_enc28j60_rx(struct device *dev, uint16_t *vlan_tag)
struct eth_enc28j60_runtime *context = dev->driver_data;
uint16_t lengthfr;
uint8_t counter;
uint8_t dummy[4];

/* Errata 6. The Receive Packet Pending Interrupt Flag (EIR.PKTIF)
* does not reliably/accurately report the status of pending packet.
Expand Down Expand Up @@ -600,13 +601,13 @@ static int eth_enc28j60_rx(struct device *dev, uint16_t *vlan_tag)
} while (frm_len > 0);

/* Let's pop the useless CRC */
eth_enc28j60_read_mem(dev, NULL, 4);
eth_enc28j60_read_mem(dev, dummy, 4);

/* Pops one padding byte from spi circular buffer
* introduced by the device when the frame length is odd
*/
if (lengthfr & 0x01) {
eth_enc28j60_read_mem(dev, NULL, 1);
eth_enc28j60_read_mem(dev, dummy, 1);
}

#if defined(CONFIG_NET_VLAN)
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10 changes: 5 additions & 5 deletions drivers/ethernet/eth_enc28j60_priv.h
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Expand Up @@ -99,12 +99,12 @@
#define ENC28J60_REG_MIRDH 0x2219

/* Bank 3 Registers */
#define ENC28J60_REG_MAADR1 0x1300
#define ENC28J60_REG_MAADR0 0x1301
#define ENC28J60_REG_MAADR5 0x1300
#define ENC28J60_REG_MAADR6 0x1301
#define ENC28J60_REG_MAADR3 0x1302
#define ENC28J60_REG_MAADR2 0x1303
#define ENC28J60_REG_MAADR5 0x1304
#define ENC28J60_REG_MAADR4 0x1305
#define ENC28J60_REG_MAADR4 0x1303
#define ENC28J60_REG_MAADR1 0x1304
#define ENC28J60_REG_MAADR2 0x1305
#define ENC28J60_REG_EBSTSD 0x0306
#define ENC28J60_REG_EBSTCON 0x0307
#define ENC28J60_REG_EBSTCSL 0x0308
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2 changes: 2 additions & 0 deletions dts/arm/nxp/nxp_lpc55S6x_common.dtsi
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Expand Up @@ -192,6 +192,8 @@

hs_lspi: spi@9f000 {
compatible = "nxp,lpc-spi";
cs-gpios = <&gpio0 20 0>,<&gpio1 1 0>,<&gpio1 12 0>,
<&gpio1 26 0>;
reg = <0x9f000 0x1000>;
interrupts = <59 0>;
label = "HS_LSPI";
Expand Down