stm32h7 spi driver uses SRAM2 buffers in NOCACHE region

[FRASTM]

The stm32H7 serie should allocate spi buffers in the SRAM2 memory area with NOCACHE attribute.
This PR is setting this SRAM2 when required by the testcase as this is specific to the application (tests/drivers/sp/spi_loopback)

In the spi_ll_stm32.c driver, when testing the buffer coherency of the spi_buf_set, the pointer but also each elements of the structure have to be checked:

struct spi_buf_set {
	const struct spi_buf *buffers;
	size_t count;
};

This is evaluated during the testcase Start null tx of the tests/drivers/spi/spi_loopback

Fixes #60977

[FRASTM]

$ west build -p auto -b nucleo_h743zi tests/drivers/spi/spi_loopback/

Running TESTSUITE spi_loopback                                                                        
===================================================================                                   
START - test_spi_loopback                                                                             
I: SPI test on buffers TX/RX 0x300200a0/0x30020080                                                    
I: SPI test slow config                                                                               
I: Start complete multiple                                                                            
I: Passed                                                                                             
I: Start complete loop                                                                                
I: Passed                                                                                             
I: Start null tx                                                                                      
I: Passed                                                                                             
I: Start half start                                                                                   
I: Passed                                                                                             
I: Skip half end                                                                                      
I: Skip every 4                                                                                       
I: SPI test fast config                                                                               
I: Start complete multiple                                                                            
I: Passed                                                                                             
I: Start complete loop                                                                                
I: Passed                                                                                             
I: Start null tx                                                                                      
I: Passed                                                                                             
I: Start half start                                                                                   
I: Passed                                                                                             
I: Skip half end                                                                                      
I: Skip every 4                                                                                       
I: Start complete loop                                                                                
I: Passed                                                                                             
I: Start complete loop                                                                                
I: Passed                                                                                             
I: All tx/rx passed                                                                                   
 PASS - test_spi_loopback in 0.049 seconds                                                            
===================================================================                                   
TESTSUITE spi_loopback succeeded                                                                      
                                                                                                      
------ TESTSUITE SUMMARY START ------                                                                 
                                                                                                      
SUITE PASS - 100.00% [spi_loopback]: pass = 1, fail = 0, skip = 0, total = 1 duration = 0.049 seconds 
 - PASS - [spi_loopback.test_spi_loopback] duration = 0.049 seconds                                   
                                                                                                      
------ TESTSUITE SUMMARY END ------     

[dgastonochoa]

Hi, I would like to remark this would still leave us with the problem of nocache regions created by using the CONFIG_NOCACHE_MEMORY + __attribute__((__section__(".nocache"))); mechanism (see #60977 (comment)). spi_buf_set_in_nocache should be modified to check the following symbols:

_nocache_ram_size
_nocache_ram_end
_nocache_ram_start

in case CONFIG_NOCACHE_MEMORY is enabled. This could be done in this PR or in another one; I'm happy to take care of it if you wish.

I believe #52965 has the same problem in address_in_non_cacheable_sram

[FRASTM]

This could be done in this PR or in another one; I'm happy to take care of it if you wish.

Yes, please, because I am really expert of all this stuff.

I believe #52965 has the same problem in address_in_non_cacheable_sram

There are probably many issues/questions about cache and MPU regions around the stm32H7.
(PR #60765, #60977, the pb I see in qspi mode with PR #61122)

[dgastonochoa]

Yes, please, because I am really expert of all this stuff.

No problem. I will wait for this to be merged so I can take advantage of the tests you have implemented. I will consider making my change using this one as base, although I'm not sure about the Zephyr's policy with regards to 'stacked' PRs.

[dgastonochoa]

This is no longer necessary I believe.

[dgastonochoa]

I have re-read the SPI header code docs. This is what it exactly says about null buffers:

/**
 * @brief SPI buffer structure
 *
 * @param buf is a valid pointer on a data buffer, or NULL otherwise.
 * @param len is the length of the buffer or, if buf is NULL, will be the
 *    length which as to be sent as dummy bytes (as TX buffer) or
 *    the length of bytes that should be skipped (as RX buffer).
 */
struct spi_buf {
	void *buf;
	size_t len;
};

Any buffer in the buf_set could be null and then, dummy bytes should be sent or ignored. Therefore, I would change this function by:

static bool is_dummy_buffer(const struct spi_buf* buf)
{
	return buf->buf == NULL;
}
...
static bool spi_buf_set_in_nocache(const struct spi_buf_set *bufs)
{
	for (size_t i = 0; i < bufs->count; i++) {
		const struct spi_buf *buf = &bufs->buffers[i];

		if (!is_dummy_buffer(buf) &&
			!buf_in_nocache((uintptr_t)buf->buf, buf->len)) {
			return false;
		}
	}
	return true;
}

and leave this as it was:

#ifdef CONFIG_SOC_SERIES_STM32H7X
	if ((tx_bufs != NULL && !spi_buf_set_in_nocache(tx_bufs)) ||
		(rx_bufs != NULL && !spi_buf_set_in_nocache(rx_bufs))) {
		return -EFAULT;
	}
#endif /* CONFIG_SOC_SERIES_STM32H7X */

[dgastonochoa]

Hi again, don't worry about this change because I have included it in #61265

[FRASTM]

This PR is no more useful as the #61265 covers all the changes