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Add rt1180 spi/edma support #77458
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Add rt1180 spi/edma support #77458
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drivers/dma/dma_mcux_edma.c
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@@ -651,10 +651,39 @@ static int dma_mcux_edma_init(const struct device *dev) | |||
irq_enable(DT_INST_IRQ_BY_IDX(n, idx, irq)); \ | |||
} | |||
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#define DMA_CHANNLES_SHARED_IRQ_MASK(i, n) \ |
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Typo
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Can you be a little more specific?
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I think CHANNLES
should be CHANNELS
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Yes, thank you, I will correct it later.
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Does the build give an error on this?
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No, build error is caused by dma_mcux_edma_error_irq_handler function defined but not used. However, IRQ_CONNECT function will include the function into interrupt function. I don't know how to resolve the building warning issue, and it seems a legacy issue. (There is standalone error IRQ on RT1180 edma.)
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Currently edma is not properly supported with NXP's LPSPI in Zephyr since the hardware chip select is not currently working in the LPSPI driver.
Seems I was a bit eager, will wait for the reviews to shake out from people with this hardware on hand
However, I enabled the lpspi_loopback case with edma and tested passed on my local. @dleach02 @danieldegrasse @decsny ,do you have any comment on lpspi_edma issue? |
I think it would be good to consider using a test other than loopback for testing DMA with LPSPI that also tests HW CS. Linking these here for tracking purposes: |
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Only rebase to the newest commit and resolve the conflicts. |
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Update lpspi blinding from "nxp,imx-lpspi" to "nxp,lpspi" |
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Only rebase to the newest commit and resolve the conflicts. |
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Rebase to #82761, resolve the tpm building issues. |
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Multi channels share one IRQ, add channels-shared-irq-mask on RT1180 attribution to describe the channel shared status, and add code implementation to register the handler function for each channel in different interrupts. Fix legacy building warning issue Signed-off-by: Lucien Zhao <[email protected]>
add lpspi clock enablement code DMA3/4 access different domain is controlled by TRDC, release all the domain access permission for DMA3/4, and add privilege and secure information in dma access request signal by DAC module Signed-off-by: Lucien Zhao <[email protected]>
add lpspi and edma instances for RT118X Find mpu description missed for RT1180X, add mpu in dts add dmas controller setting for lpspi instances Signed-off-by: Lucien Zhao <[email protected]>
On RT1180, two lpspis share the same clock root, support lpspi in clock driver for RT118x Signed-off-by: Lucien Zhao <[email protected]>
Add pinctrl and dma channel/mux information for lpspi3 on cm33/cm7 cores. Set dma4 status is OK. Add pinctrl for lpuart3 tests: driver: spi: support spi_loopback case on MIMXRT1180_EVK Add .config/.overlay files for cm33/cm7 cores Link to ocram1 as RAM region on cm7 core Link to dtcm as RAM region on cm33 core Signed-off-by: Lucien Zhao <[email protected]>
Due to cm7 on RT1180 is secondary core, and dtcm have been used as sram directly, so there is no need to define zephyr,dtcm node. Signed-off-by: Lucien Zhao <[email protected]>
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Only rebase the main branch newest commit and resolve the conflicts. |
Anyone can help to merge the PR? |
need assignee approval |
@tbursztyka , could you help approve and merge the PR? |
/* To test this sample, connect J44.8 <-> J44.10 */