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3 changes: 3 additions & 0 deletions boards/qemu/max/Kconfig
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# Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
# Copyright 2024-2025 openEuler SIG-Zephyr
# SPDX-License-Identifier: Apache-2.0
36 changes: 36 additions & 0 deletions boards/qemu/max/Kconfig.defconfig
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# Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
# Copyright 2024-2025 openEuler SIG-Zephyr
# SPDX-License-Identifier: Apache-2.0

if BOARD_QEMU_MAX

config BUILD_OUTPUT_BIN
default y

config MAX_THREAD_BYTES
default 3

# QEMU PCI requires at least 256M of virtual space
config KERNEL_VM_SIZE
default 0x80000000 if PCIE

# QEMU PCI requires physical addresses with more than 32 bits
choice ARM64_VA_BITS
default ARM64_VA_BITS_40 if PCIE
endchoice

choice ARM64_PA_BITS
default ARM64_PA_BITS_40 if PCIE
endchoice

if QEMU_ICOUNT

config QEMU_ICOUNT_SHIFT
default 4

config QEMU_ICOUNT_SLEEP
default y

endif # QEMU_ICOUNT

endif # BOARD_QEMU_MAX
6 changes: 6 additions & 0 deletions boards/qemu/max/Kconfig.qemu_max
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# Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
# Copyright 2024-2025 openEuler SIG-Zephyr
# SPDX-License-Identifier: Apache-2.0

config BOARD_QEMU_MAX
select SOC_QEMU_MAX
22 changes: 22 additions & 0 deletions boards/qemu/max/board.cmake
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# Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
# Copyright 2024-2025 openEuler SIG-Zephyr
# SPDX-License-Identifier: Apache-2.0

set(SUPPORTED_EMU_PLATFORMS qemu)
set(QEMU_ARCH aarch64)

set(QEMU_CPU_TYPE_${ARCH} max)

if(CONFIG_ARMV8_A_NS)
set(QEMU_MACH virt,gic-version=3)
else()
set(QEMU_MACH virt,secure=on,gic-version=3)
endif()

set(QEMU_FLAGS_${ARCH}
-cpu ${QEMU_CPU_TYPE_${ARCH}}
-nographic
-machine ${QEMU_MACH}
)

board_set_debugger_ifnset(qemu)
8 changes: 8 additions & 0 deletions boards/qemu/max/board.yml
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board:
name: qemu_max
full_name: QEMU Emulation for ARM MAX
vendor: arm
socs:
- name: qemu_max
variants:
- name: smp
109 changes: 109 additions & 0 deletions boards/qemu/max/doc/index.rst
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.. zephyr:board:: qemu_max
Overview
********

This board configuration will use QEMU to emulate a generic MAX hardware
platform.

This configuration provides support for an ARM MAX CPU and these
devices:

* GIC-400 interrupt controller
* ARM architected timer
* PL011 UART controller

Hardware
********
Supported Features
==================

The following hardware features are supported:

+--------------+------------+----------------------+
| Interface | Controller | Driver/Component |
+==============+============+======================+
| GIC | on-chip | interrupt controller |
+--------------+------------+----------------------+
| PL011 UART | on-chip | serial port |
+--------------+------------+----------------------+
| ARM TIMER | on-chip | system clock |
+--------------+------------+----------------------+

The kernel currently does not support other hardware features on this platform.

Devices
========
System Clock
------------

This board configuration uses a system clock frequency of 62.5 MHz.

Serial Port
-----------

This board configuration uses a single serial communication channel with the
CPU's UART0.

Known Problems or Limitations
==============================

The following platform features are unsupported:

* Writing to the hardware's flash memory


Programming and Debugging
*************************

Use this configuration to run basic Zephyr applications and kernel tests in the QEMU
emulated environment, for example, with the :zephyr:code-sample:`synchronization` sample:

.. zephyr-app-commands::
:zephyr-app: samples/synchronization
:host-os: unix
:board: qemu_max
:goals: run

This will build an image with the synchronization sample app, boot it using
QEMU, and display the following console output:

.. code-block:: console
***** Booting Zephyr OS build zephyr-v2.0.0-1657-g99d310da48e5 *****
threadA: Hello World from cpu 0 on qemu_max!
threadB: Hello World from cpu 0 on qemu_max!
threadA: Hello World from cpu 0 on qemu_max!
threadB: Hello World from cpu 0 on qemu_max!
threadA: Hello World from cpu 0 on qemu_max!
threadB: Hello World from cpu 0 on qemu_max!
threadA: Hello World from cpu 0 on qemu_max!
threadB: Hello World from cpu 0 on qemu_max!
Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`.

Debugging
=========

Refer to the detailed overview about :ref:`application_debugging`.

Networking
==========

The board supports the QEMU built-in Ethernet adapter to connect to the host
system. See :ref:`networking_with_eth_qemu` for details.

It is also possible to use SLIP networking over an emulated serial port.
Although this board only supports a single UART, so subsystems like logging
and shell would need to be disabled, therefore this is not directly supported.

References
**********

.. target-notes::

1. (ID050815) ARM® Cortex®-A Series - Programmer’s Guide for ARMv8-A
2. (ID070919) Arm® Architecture Reference Manual - Armv8, for Armv8-A architecture profile
3. (ARM DAI 0527A) Application Note Bare-metal Boot Code for ARMv8-A Processors
4. AArch64 Exception and Interrupt Handling
5. Fundamentals of ARMv8-A
39 changes: 39 additions & 0 deletions boards/qemu/max/qemu_max.dts
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/*
* Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
* Copyright 2024-2025 openEuler SIG-Zephyr
*
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;
#include <arm64/qemu/qemu-virt-max.dtsi>

/ {
model = "QEMU MAX";
compatible = "qemu,arm-max";

psci {
compatible = "arm,psci-0.2";
method = "hvc";
};

chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
};

soc {
sram0: memory@40000000 {
compatible = "mmio-sram";
reg = <0x0 0x40000000 0x0 DT_SIZE_M(128)>;
};
};

};

&uart0 {
status = "okay";
current-speed = <115200>;
};
16 changes: 16 additions & 0 deletions boards/qemu/max/qemu_max.yaml
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identifier: qemu_max
name: QEMU Emulation for ARM MAX
type: qemu
simulation:
- name: qemu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 128
testing:
default: true
ignore_tags:
- net
- bluetooth
vendor: qemu
21 changes: 21 additions & 0 deletions boards/qemu/max/qemu_max_defconfig
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CONFIG_ARM_ARCH_TIMER=y

# Cache management
CONFIG_CACHE_MANAGEMENT=y

# Enable UART driver
CONFIG_SERIAL=y

# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# Enable serial port
CONFIG_UART_INTERRUPT_DRIVEN=y

# Avoid timing skew in tests
CONFIG_QEMU_ICOUNT=y


# MMU Options
CONFIG_MAX_XLAT_TABLES=32
8 changes: 8 additions & 0 deletions boards/qemu/max/qemu_max_qemu_max_smp.dts
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/*
* Copyright 2024-2025 HNU-ESNL: Guoqi Xie, Chenglai Xiong, Xingyu Hu and etc.
* Copyright 2024-2025 openEuler SIG-Zephyr
*
* SPDX-License-Identifier: Apache-2.0
*/

#include "qemu_max.dts"
18 changes: 18 additions & 0 deletions boards/qemu/max/qemu_max_qemu_max_smp.yaml
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identifier: qemu_max/qemu_max/smp
name: QEMU Emulation for MAX SMP (ARM)
type: qemu
simulation:
- name: qemu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 128
supported:
- smp
testing:
default: true
ignore_tags:
- net
- bluetooth
vendor: qemu
32 changes: 32 additions & 0 deletions boards/qemu/max/qemu_max_qemu_max_smp_defconfig
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CONFIG_ARM_ARCH_TIMER=y

# Cache management
CONFIG_CACHE_MANAGEMENT=y

# Enable UART driver
CONFIG_SERIAL=y

# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# Enable serial port
CONFIG_UART_INTERRUPT_DRIVEN=y

# icount does not work well with SMP
CONFIG_QEMU_ICOUNT=n

# We have multiple QEMU-A53 boards, so let us exercise ARMV8_A_NS on this one
# (plus it is needed for SMP)
CONFIG_ARMV8_A_NS=y

# PSCI is supported with NS
CONFIG_PM_CPU_OPS=y

# SMP-related
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_TIMEOUT_64BIT=y

# MMU Options
CONFIG_MAX_XLAT_TABLES=32
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