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drivers: mdio_esp32: let the REF_CLK be initialized before the PHY. #75024
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drivers: mdio_esp32: let the REF_CLK be initialized before the PHY. #75024
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Hello @iwasz, and thank you very much for your first pull request to the Zephyr project! |
Hi @iwasz, any reason why the original location of the clock init remains the same? |
Hey! I was unsure what to do about it. There's an #if !DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios)
emac_hal_iomux_rmii_clk_input();
emac_ll_clock_enable_rmii_input(dev_data->hal.ext_regs);
#endif And then having ref-clk-output-gpios defined in the eth (i mean here |
This PR gets Ethernet working on the Olimex ESP32_POE boards. My current setup: https://github.com/simpleiot/zephyr-siot Note, |
When GPIO17 or 16 is used as an external REF_CLK signal, the output is enabled in eth_esp32.c This was added in PR number zephyrproject-rtos#65759 and then refined in PR zephyrproject-rtos#74442. However this does not work for PHYs which need the REF_CLK for MDIO communication, such as LAN8720A. In such cases phy_mii driver tries to get the ID of such a PHY before REF_CLK is present. Therefore in this PR I propose to move REF_CLK initialization from eth_esp32.c to mdio_esp32.c which gets initialized before PHY and ETH. Signed-off-by: Łukasz Iwaszkiewicz <[email protected]>
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@sylvioalves please take a look |
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Those changes do not look correct. That is copied and pasted from the eth_esp32
driver. @sylvioalves, could you take a look at it?
@sylvioalves wonder if you can have a look so we can unblock this |
This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time. |
Hi, we still need this fix. Is there any chance this can be merged, or an alternate solution worked on? |
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unblock
Hi @iwasz! To celebrate this milestone and showcase your contribution, we'd love to award you the Zephyr Technical Contributor badge. If you're interested, please claim your badge by filling out this form: Claim Your Zephyr Badge. Thank you for your valuable input, and we look forward to seeing more of your contributions in the future! 🪁 |
When GPIO17 or 16 is used as an external REF_CLK signal, the output is enabled in eth_esp32.c This was added in PR number #65759 (by @bbilas ) and then refined in PR #74442 (by @sylvioalves). However this does not work for PHYs which need the REF_CLK for MDIO communication, such as LAN8720A. In such cases phy_mii driver tries to get the ID of such a PHY before REF_CLK is present. Therefore in this PR I propose to move REF_CLK initialization from eth_esp32.c to mdio_esp32.c which gets initialized before PHY and ETH.
There's a topic about this as well: #68907