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bugfix: driver: esp32: eth_mdio: fix clock and function calls #74442
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bugfix: driver: esp32: eth_mdio: fix clock and function calls #74442
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It is also important to mention that current |
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The following west manifest projects have been modified in this Pull Request:
Note: This message is automatically posted and updated by the Manifest GitHub Action. |
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Both MDIO and Ethernet drivers share the same clock subsystem. After clock control update in zephyrproject-rtos#73807, clock_control_on() now returns -EALREADY for already initialized clock subsystem. As a result, ethernet driver won't initialize as needed. Fixes zephyrproject-rtos#74440 Signed-off-by: Sylvio Alves <[email protected]>
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Bebased again to check whether Babblesim stops failing. |
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When external PHY has crystal, ESP32 can be configured to use custom GPIO as clock source for it. However, due to latest clock subsystem and hal updates, current driver fails to build and blocks its usage. Signed-off-by: Sylvio Alves <[email protected]>
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When GPIO17 or 16 is used as an external REF_CLK signal, the output is enabled in eth_esp32.c This was added in PR number zephyrproject-rtos#65759 and then refined in PR zephyrproject-rtos#74442. However this does not work for PHYs which need the REF_CLK for MDIO communication, such as LAN8720A. In such cases phy_mii driver tries to get the ID of such a PHY before REF_CLK is present. Therefore in this PR I propose to move REF_CLK initialization from eth_esp32.c to mdio_esp32.c which gets initialized before PHY and ETH. Signed-off-by: Łukasz Iwaszkiewicz <[email protected]>
When GPIO17 or 16 is used as an external REF_CLK signal, the output is enabled in eth_esp32.c This was added in PR number #65759 and then refined in PR #74442. However this does not work for PHYs which need the REF_CLK for MDIO communication, such as LAN8720A. In such cases phy_mii driver tries to get the ID of such a PHY before REF_CLK is present. Therefore in this PR I propose to move REF_CLK initialization from eth_esp32.c to mdio_esp32.c which gets initialized before PHY and ETH. Signed-off-by: Łukasz Iwaszkiewicz <[email protected]>
When GPIO17 or 16 is used as an external REF_CLK signal, the output is enabled in eth_esp32.c This was added in PR number zephyrproject-rtos#65759 and then refined in PR zephyrproject-rtos#74442. However this does not work for PHYs which need the REF_CLK for MDIO communication, such as LAN8720A. In such cases phy_mii driver tries to get the ID of such a PHY before REF_CLK is present. Therefore in this PR I propose to move REF_CLK initialization from eth_esp32.c to mdio_esp32.c which gets initialized before PHY and ETH. Signed-off-by: Łukasz Iwaszkiewicz <[email protected]>
Both MDIO and Ethernet drivers share the same clock subsystem. After clock control update in #73807, clock_control_on() now returns -EALREADY for already initialized clock subsystem. As a result, ethernet driver won't initialize as needed.
Due to the same clock control and hal updates, internal functions required updates.
Fixes #74440
Fixes #74632
As this PR updates hal_espressif, it also fixes #74632.