-
Notifications
You must be signed in to change notification settings - Fork 7.4k
stm32 xspi bindings fixes dtc warnings #88646
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
No warning during west build -b stm32h573i_dk samples/application_development/code_relocation_nocopy
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Please update migration guide, as this change will break out of tree users.
80bb911
to
0d2c8d4
Compare
Adding text for the doc: release-notes-4-2: |
If possible, making multiple commits in this PR could help reduce email noise :) |
Now adding the part for the stm32 PSRAM driver |
ci failure : #89081 |
This PR adds the size in Bits of the flash nor memory for the st,stm32-xspi-nor compatible Signed-off-by: Francois Ramu <[email protected]>
This PR adds the size in Bits of the PSRAM memory for the st,stm32-xspi-psram compatible Signed-off-by: Francois Ramu <[email protected]>
The st,stm32-xspi compatible is defining the reg property with the register address and size at first index followed by the external memory base address and max allocated size. For the stm32N6 serie, xspi1 is addressing max 256 MBytes from 0x90000000 xspi2 is addressing max 256 MBytes from 0x70000000 Signed-off-by: Francois Ramu <[email protected]>
The st,stm32-xspi compatible is defining the reg property with the register address and size at first index followed by the external memory base address and max allocated xspi1 is addressing max 256 MBytes from 0x90000000 Signed-off-by: Francois Ramu <[email protected]>
New property of the st,stm32-xspi-nor compatible gives the external NOR flash in bits. The property of the st,stm32-xspi compatible gives the external NOR flash base address Signed-off-by: Francois Ramu <[email protected]>
New property of the st,stm32-xspi-psram compatible gives the external PSRAM memory in bits. The property of the st,stm32-xspi compatible gives the external PSRAM memory base address Signed-off-by: Francois Ramu <[email protected]>
This PR defines the "st,stm32-xspi-nor" compatible Node and the "st,stm32-xspi-psram" compatible Node in conformance to the DTS specifications Includes the size property (in Bits) of the external memory device Signed-off-by: Francois Ramu <[email protected]>
This PR defines the "st,stm32-xspi-nor" compatible Node in conformance to the DTS specifications Includes the size property (in Bits) of the external NOR device Signed-off-by: Francois Ramu <[email protected]>
In case of the st,stm32-xspi-nor compatible new property and node definitions will requires new macro to get the external NOR flash base address and size Signed-off-by: Francois Ramu <[email protected]>
Change to apply on the DTS of STM32 soc and boards with xSPI nodes Signed-off-by: Francois Ramu <[email protected]>
This PR is for fixing the #88404 for the XSPI compatible
It changes the way the "st,stm32-xspi-nor" compatible declares the external flash base address and size.
The "st,stm32-xspi" node, gives the external memory base address and maximum allocated space (in bytes):
The "st,stm32-xspi-nor" node, gives the external NOR device size in Bits through the
size
property