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stm32h5 run application in external flash memory XIP #88579

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@FRASTM FRASTM commented Apr 14, 2025

the stm32h5 disco kit board can run an application in external flash

Requires the #88646 which removes the warning in the DTC

With this PR it enable the memorymapped mode on the external flash memory so that XIP is possible on the external NOR octoflash

Two samples are running in XIP on the external flash

samples/application_development/code_relocation_nocopy/
samples/boards/st/hello_world_xip/ built with mcu boot mcu-tools/mcuboot#2154

Fixes #87531

This PR is a subset of the #88052

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FRASTM commented Apr 14, 2025

west build -b stm32h573i_dk samples/application_development/code_relocation_nocopy/
west flash : stm32cubeprogrammer runner is taking the external loader to download into the external NOR (0x90000000)

*** Booting Zephyr OS build v4.1.0-2350-g86df576c4134 ***
Address of main function 0x80005e1
Address of function_in_ext_flash 0x90000001
Address of var_ext_sram_data 0x200000a0 (10)
Address of function_in_sram 0x20000001
Address of var_sram_data 0x200000a4 (10)
Hello World! stm32h573i_dk

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FRASTM commented Apr 14, 2025

west build -p -b stm32h573i_dk samples/boards/st/hello_world_xip/ --sysbuild -- -DSB_CONFIG_BOOTLOADER_MCUBOOT=y

requires mcu-tools/mcuboot#2154
download with stm32cubeprogrammer GUI

  • the build/mcuboot/zephyr/zephyr.bin at internal flash address 0x8000000
  • the build/hello_world_xip/zephyr/zephyr.signed.bin at external flash address 0x90000000
*** Booting MCUboot v2.1.0-rc1-276-g540654e87167 ***
*** Using Zephyr OS build v4.1.0-2352-gb567cdd8cbfb ***
I: Starting bootloader
I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3
I: Boot source: none
I: Image index: 0, Swap type: none
I: Bootloader chainload address offset: 0x0
I: Image version: v0.0.0
I: Jumping to the first image slot
*** Booting Zephyr OS build v4.1.0-2352-gb567cdd8cbfb ***                       
Hello World! from external flash  stm32h573i_dk                                 
--> PC at 0x9000092a    

@FRASTM FRASTM force-pushed the stm32h5_xip branch 3 times, most recently from 0eed22a to 0a25f40 Compare April 14, 2025 12:32
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FRASTM commented Apr 14, 2025

Define larger partition in the external NOR flash (consequently adjusting the SECTOR size for the mcu boot)

@FRASTM FRASTM force-pushed the stm32h5_xip branch 2 times, most recently from c3998c8 to d0126b3 Compare April 14, 2025 13:47
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FRASTM commented Apr 14, 2025

CI failure "invalid length for memory region EXTFLASH" given by the samples/application_development/code_relocation_nocopy/linker_arm_nocopy.ld

map giving : EXTFLASH 0x0000000090000000 0xffffffffffffffff xr

Build operation displays wrong extflash too:

Memory region         Used Size  Region Size  %age Used
        EXTFLASH:          56 B 18446744073709551615 B      0.00%

compared to

Memory region         Used Size  Region Size  %age Used
        EXTFLASH:          56 B        64 MB      0.00%

when #define EXTFLASH_SIZE (0x4000000)

It looks like the DT_INST_REG_SIZE does not exist for the st,stm32-xspi-nor compat (DT_INST_REG_ADDR exists)

--> see issue #88404

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tpambor commented Apr 15, 2025

See #88392 for a fix.

@FRASTM FRASTM force-pushed the stm32h5_xip branch 3 times, most recently from 9bb0775 to 9d2579a Compare April 16, 2025 11:55
This PR adds the size in Bits of the flash nor memory
for the st,stm32-xspi-nor compatible

Signed-off-by: Francois Ramu <[email protected]>
@FRASTM FRASTM force-pushed the stm32h5_xip branch 3 times, most recently from 16878f8 to 048cb76 Compare April 23, 2025 13:56
FRASTM added 13 commits April 24, 2025 15:53
This PR adds the size in Bits of the PSRAM  memory
for the st,stm32-xspi-psram compatible

Signed-off-by: Francois Ramu <[email protected]>
The st,stm32-xspi compatible is defining the reg property
with the register address and size at first index
followed by the external memory base address and max allocated
size. For the stm32N6 serie,
xspi1 is addressing max 256 MBytes from 0x90000000
xspi2 is addressing max 256 MBytes from 0x70000000

Signed-off-by: Francois Ramu <[email protected]>
The st,stm32-xspi compatible is defining the reg property
with the register address and size at first index
followed by the external memory base address and max allocated
xspi1 is addressing max 256 MBytes from 0x90000000

Signed-off-by: Francois Ramu <[email protected]>
New property of the st,stm32-xspi-nor compatible gives
the external NOR flash in bits.
The property of the st,stm32-xspi compatible gives
the external NOR flash base address

Signed-off-by: Francois Ramu <[email protected]>
New property of the st,stm32-xspi-psram compatible gives
the external PSRAM memory in bits.
The property of the st,stm32-xspi compatible gives
the external PSRAM memory base address

Signed-off-by: Francois Ramu <[email protected]>
This PR defines the "st,stm32-xspi-nor" compatible Node
and the "st,stm32-xspi-psram" compatible Node
in conformance to the DTS specifications
Includes the size property (in Bits) of the external memory device

Signed-off-by: Francois Ramu <[email protected]>
This PR defines the "st,stm32-xspi-nor" compatible Node
in conformance to the DTS specifications
Includes the size property (in Bits) of the external NOR device

Signed-off-by: Francois Ramu <[email protected]>
In case of the st,stm32-xspi-nor compatible
new property and node definitions will requires new macro
to get the external NOR flash base address and size

Signed-off-by: Francois Ramu <[email protected]>
Change to apply on the DTS of STM32 soc and boards with xSPI nodes

Signed-off-by: Francois Ramu <[email protected]>
Add the clock domain configuration for the xspi nodes
Where the DTS defines main clock and peripheral clock sel
plus a XSPIM clock

Signed-off-by: Francois Ramu <[email protected]>
Do not disable the pll clock if it source the xspi and if the external
flash is executing in Place. On mcuboot reset, the code is executed
on the external flash through the xspi. It must not disable its own
clock source.

Signed-off-by: Francois Ramu <[email protected]>
Add the XSPI 2 which is an octoSPI connection to a octo NOR flash
mx25lm51245 on the stm32h573i_dk disco kit
Define the partition on the 64MBytes space of the external flash
Use the STM32Cube programmer to flash with the corresponding
external loader for XiP mode.
Removing usb_device will avoid test feature for that board.

Signed-off-by: Francois Ramu <[email protected]>
Samples to demonstrate the XiP mode when using an external NOR flash
in MemoryMapped mode
Defines the partition for the external memory of the stm32H5 disco

Signed-off-by: Francois Ramu <[email protected]>
@FRASTM FRASTM added the DNM This PR should not be merged (Do Not Merge) label Apr 24, 2025
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FRASTM commented Apr 24, 2025

set the DNM mabel until the #88646 is merged

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stm32h573i_dk can't boot from external flash with mcuboot
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